Intel ACPI Component Architecture ACPI Binary Table Extraction Utility version 20160831-64 Copyright (c) 2000 - 2016 Intel Corporation Signature Length Revision OemId OemTableId OemRevision CompilerId CompilerRevision SSDT 0x000009F1 0x01 "PmRef " "CpuPm " 0x00003000 "INTL" 0x20060912 SPCR 0x00000050 0x01 "PTLTD " "$UCRTBL$" 0x06040000 "PTL " 0x00000001 MCFG 0x0000003C 0x01 "INTEL " "CALPELLA" 0x06040000 "PTEC" 0x00000001 ASF! 0x000000A0 0x10 " CETP" " CETP" 0x06040000 "PTL " 0x00000001 APIC 0x00000084 0x01 "PTLTD " " APIC " 0x06040000 " LTP" 0x00000000 BOOT 0x00000028 0x01 "PTLTD " "$SBFTBL$" 0x06040000 " LTP" 0x00000001 DSDT 0x0000A34E 0x02 "Intel " "CALPELLA" 0x06040000 "INTL" 0x20060912 FACP 0x000000F4 0x03 "INTEL " "CALPELLA" 0x06040000 "PTEC" 0x00000001 HPET 0x00000038 0x01 "INTEL " "CALPELLA" 0x06040000 "PTEC" 0x00000001 FACS 0x00000040 SSDT 0x00000303 0x01 "PmRef " "ApIst " 0x00003000 "INTL" 0x20060912 SSDT 0x000003F0 0x01 "PmRef " "Cpu0Ist " 0x00003000 "INTL" 0x20060912 SSDT 0x00000119 0x01 "PmRef " "ApCst " 0x00003000 "INTL" 0x20060912 SSDT 0x00000891 0x01 "PmRef " "Cpu0Cst " 0x00003001 "INTL" 0x20060912 Found 14 ACPI tables in /root/HW_PROBE/LATEST/lpt3uqsH0R/hw.info/logs/acpidump APIC ---- [000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] [004h 0004 4] Table Length : 00000084 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : B2 [00Ah 0010 6] Oem ID : "PTLTD " [010h 0016 8] Oem Table ID : " APIC " [018h 0024 4] Oem Revision : 06040000 [01Ch 0028 4] Asl Compiler ID : " LTP" [020h 0032 4] Asl Compiler Revision : 00000000 [024h 0036 4] Local Apic Address : FEE00000 [028h 0040 4] Flags (decoded below) : 00000001 PC-AT Compatibility : 1 [02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] [02Dh 0045 1] Length : 08 [02Eh 0046 1] Processor ID : 00 [02Fh 0047 1] Local Apic ID : 00 [030h 0048 4] Flags (decoded below) : 00000001 Processor Enabled : 1 [034h 0052 1] Subtable Type : 00 [Processor Local APIC] [035h 0053 1] Length : 08 [036h 0054 1] Processor ID : 01 [037h 0055 1] Local Apic ID : 04 [038h 0056 4] Flags (decoded below) : 00000001 Processor Enabled : 1 [03Ch 0060 1] Subtable Type : 00 [Processor Local APIC] [03Dh 0061 1] Length : 08 [03Eh 0062 1] Processor ID : 02 [03Fh 0063 1] Local Apic ID : 01 [040h 0064 4] Flags (decoded below) : 00000001 Processor Enabled : 1 [044h 0068 1] Subtable Type : 00 [Processor Local APIC] [045h 0069 1] Length : 08 [046h 0070 1] Processor ID : 03 [047h 0071 1] Local Apic ID : 05 [048h 0072 4] Flags (decoded below) : 00000001 Processor Enabled : 1 [04Ch 0076 1] Subtable Type : 01 [I/O APIC] [04Dh 0077 1] Length : 0C [04Eh 0078 1] I/O Apic ID : 02 [04Fh 0079 1] Reserved : 00 [050h 0080 4] Address : FEC00000 [054h 0084 4] Interrupt : 00000000 [058h 0088 1] Subtable Type : 04 [Local APIC NMI] [059h 0089 1] Length : 06 [05Ah 0090 1] Processor ID : 00 [05Bh 0091 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [05Dh 0093 1] Interrupt Input LINT : 01 [05Eh 0094 1] Subtable Type : 04 [Local APIC NMI] [05Fh 0095 1] Length : 06 [060h 0096 1] Processor ID : 01 [061h 0097 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [063h 0099 1] Interrupt Input LINT : 01 [064h 0100 1] Subtable Type : 04 [Local APIC NMI] [065h 0101 1] Length : 06 [066h 0102 1] Processor ID : 02 [067h 0103 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [069h 0105 1] Interrupt Input LINT : 01 [06Ah 0106 1] Subtable Type : 04 [Local APIC NMI] [06Bh 0107 1] Length : 06 [06Ch 0108 1] Processor ID : 03 [06Dh 0109 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [06Fh 0111 1] Interrupt Input LINT : 01 [070h 0112 1] Subtable Type : 02 [Interrupt Source Override] [071h 0113 1] Length : 0A [072h 0114 1] Bus : 00 [073h 0115 1] Source : 00 [074h 0116 4] Interrupt : 00000002 [078h 0120 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [07Ah 0122 1] Subtable Type : 02 [Interrupt Source Override] [07Bh 0123 1] Length : 0A [07Ch 0124 1] Bus : 00 [07Dh 0125 1] Source : 09 [07Eh 0126 4] Interrupt : 00000009 [082h 0130 2] Flags (decoded below) : 000D Polarity : 1 Trigger Mode : 3 Raw Table Data: Length 132 (0x84) 0000: 41 50 49 43 84 00 00 00 01 B2 50 54 4C 54 44 20 // APIC......PTLTD 0010: 09 20 41 50 49 43 20 20 00 00 04 06 20 4C 54 50 // . APIC .... LTP 0020: 00 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ 0030: 01 00 00 00 00 08 01 04 01 00 00 00 00 08 02 01 // ................ 0040: 01 00 00 00 00 08 03 05 01 00 00 00 01 0C 02 00 // ................ 0050: 00 00 C0 FE 00 00 00 00 04 06 00 05 00 01 04 06 // ................ 0060: 01 05 00 01 04 06 02 05 00 01 04 06 03 05 00 01 // ................ 0070: 02 0A 00 00 02 00 00 00 05 00 02 0A 00 09 09 00 // ................ 0080: 00 00 0D 00 // .... ASF! ---- [000h 0000 4] Signature : "ASF!" [Alert Standard Format table] [004h 0004 4] Table Length : 000000A0 [008h 0008 1] Revision : 10 [009h 0009 1] Checksum : C7 [00Ah 0010 6] Oem ID : " CETP" [010h 0016 8] Oem Table ID : " CETP" [018h 0024 4] Oem Revision : 06040000 [01Ch 0028 4] Asl Compiler ID : "PTL " [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 1] Subtable Type : 00 [ASF Information] [025h 0037 1] Reserved : 00 [026h 0038 2] Length : 0010 [028h 0040 1] Minimum Reset Value : 3C [029h 0041 1] Minimum Polling Interval : 02 [02Ah 0042 2] System ID : 1234 [02Ch 0044 4] Manufacturer ID : 000011BE [030h 0048 1] Flags : 00 [031h 0049 3] Reserved : 000000 [034h 0052 1] Subtable Type : 01 [ASF Alerts] [035h 0053 1] Reserved : 00 [036h 0054 2] Length : 002C [038h 0056 1] AssertMask : 00 [039h 0057 1] DeassertMask : 00 [03Ah 0058 1] Alert Count : 03 [03Bh 0059 1] Alert Data Length : 0C [03Ch 0060 1] Address : 89 [03Dh 0061 1] Command : 04 [03Eh 0062 1] Mask : 01 [03Fh 0063 1] Value : 01 [040h 0064 1] SensorType : 05 [041h 0065 1] Type : 6F [042h 0066 1] Offset : 00 [043h 0067 1] SourceType : 68 [044h 0068 1] Severity : 08 [045h 0069 1] SensorNumber : 88 [046h 0070 1] Entity : 17 [047h 0071 1] Instance : 00 [048h 0072 1] Address : 89 [049h 0073 1] Command : 04 [04Ah 0074 1] Mask : 04 [04Bh 0075 1] Value : 04 [04Ch 0076 1] SensorType : 07 [04Dh 0077 1] Type : 6F [04Eh 0078 1] Offset : 00 [04Fh 0079 1] SourceType : 68 [050h 0080 1] Severity : 20 [051h 0081 1] SensorNumber : 88 [052h 0082 1] Entity : 03 [053h 0083 1] Instance : 00 [054h 0084 1] Address : 89 [055h 0085 1] Command : 05 [056h 0086 1] Mask : 01 [057h 0087 1] Value : 01 [058h 0088 1] SensorType : 19 [059h 0089 1] Type : 6F [05Ah 0090 1] Offset : 00 [05Bh 0091 1] SourceType : 68 [05Ch 0092 1] Severity : 20 [05Dh 0093 1] SensorNumber : 88 [05Eh 0094 1] Entity : 22 [05Fh 0095 1] Instance : 00 [060h 0096 1] Subtable Type : 02 [ASF Remote Control] [061h 0097 1] Reserved : 00 [062h 0098 2] Length : 0018 [064h 0100 1] Control Count : 04 [065h 0101 1] Control Data Length : 04 [066h 0102 2] Reserved : 0000 [068h 0104 1] Function : 02 [069h 0105 1] Address : 88 [06Ah 0106 1] Command : 00 [06Bh 0107 1] Value : 01 [06Ch 0108 1] Function : 01 [06Dh 0109 1] Address : 88 [06Eh 0110 1] Command : 00 [06Fh 0111 1] Value : 02 [070h 0112 1] Function : 00 [071h 0113 1] Address : 88 [072h 0114 1] Command : 00 [073h 0115 1] Value : 03 [074h 0116 1] Function : 03 [075h 0117 1] Address : 88 [076h 0118 1] Command : 00 [077h 0119 1] Value : 04 [078h 0120 1] Subtable Type : 03 [ASF RMCP Boot Options] [079h 0121 1] Reserved : 00 [07Ah 0122 2] Length : 0017 [07Ch 0124 7] Capabilities : 20 F8 00 00 00 12 F0 [083h 0131 1] Completion Code : 00 [084h 0132 4] Enterprise ID : FF53F000 [088h 0136 1] Command : 00 [089h 0137 2] Parameter : E2C3 [08Bh 0139 2] Boot Options : 00E2 [08Dh 0141 2] Oem Parameters : 53F0 [08Fh 0143 1] Subtable Type : 84 [ASF Address] [090h 0144 1] Reserved : 00 [091h 0145 2] Length : 0011 [093h 0147 1] Eprom Address : 00 [094h 0148 1] Device Count : 0B [095h 0149 1] Addresses : 5C 68 88 C2 D2 DC A0 A2 A4 A6 C8 Raw Table Data: Length 160 (0xA0) 0000: 41 53 46 21 A0 00 00 00 10 C7 20 20 43 45 54 50 // ASF!...... CETP 0010: 20 20 20 20 43 45 54 50 00 00 04 06 50 54 4C 20 // CETP....PTL 0020: 01 00 00 00 00 00 10 00 3C 02 34 12 BE 11 00 00 // ........<.4..... 0030: 00 00 00 00 01 00 2C 00 00 00 03 0C 89 04 01 01 // ......,......... 0040: 05 6F 00 68 08 88 17 00 89 04 04 04 07 6F 00 68 // .o.h.........o.h 0050: 20 88 03 00 89 05 01 01 19 6F 00 68 20 88 22 00 // ........o.h .". 0060: 02 00 18 00 04 04 00 00 02 88 00 01 01 88 00 02 // ................ 0070: 00 88 00 03 03 88 00 04 03 00 17 00 20 F8 00 00 // ............ ... 0080: 00 12 F0 00 00 F0 53 FF 00 C3 E2 E2 00 F0 53 84 // ......S.......S. 0090: 00 11 00 00 0B 5C 68 88 C2 D2 DC A0 A2 A4 A6 C8 // .....\h......... BOOT ---- [000h 0000 4] Signature : "BOOT" [Simple Boot Flag Table] [004h 0004 4] Table Length : 00000028 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : A5 [00Ah 0010 6] Oem ID : "PTLTD " [010h 0016 8] Oem Table ID : "$SBFTBL$" [018h 0024 4] Oem Revision : 06040000 [01Ch 0028 4] Asl Compiler ID : " LTP" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 1] Boot Register Index : 36 [025h 0037 3] Reserved : 000000 Raw Table Data: Length 40 (0x28) 0000: 42 4F 4F 54 28 00 00 00 01 A5 50 54 4C 54 44 20 // BOOT(.....PTLTD 0010: 24 53 42 46 54 42 4C 24 00 00 04 06 20 4C 54 50 // $SBFTBL$.... LTP 0020: 01 00 00 00 36 00 00 00 // ....6... DSDT ---- DefinitionBlock ("", "DSDT", 2, "Intel ", "CALPELLA", 0x06040000) { /* * iASL Warning: There were 3 external control methods found during * disassembly, but only 0 were resolved (3 unresolved). Additional * ACPI tables may be required to properly disassemble the code. This * resulting disassembler output file may not compile because the * disassembler did not know how many arguments to assign to the * unresolved methods. Note: SSDTs can be dynamically loaded at * runtime and may or may not be available via the host OS. * * To specify the tables needed to resolve external control method * references, the -e option can be used to specify the filenames. * Example iASL invocations: * iasl -e ssdt1.aml ssdt2.aml ssdt3.aml -d dsdt.aml * iasl -e dsdt.aml ssdt2.aml -d ssdt1.aml * iasl -e ssdt*.aml -d dsdt.aml * * In addition, the -fe option can be used to specify a file containing * control method external declarations with the associated method * argument counts. Each line of the file must be of the form: * External (<method pathname>, MethodObj, <argument count>) * Invocation: * iasl -fe refs.txt -d dsdt.aml * * The following methods were unresolved and many not compile properly * because the disassembler had to guess at the number of arguments * required for each: */ External (_PR_.CPU0._PPC, UnknownObj) External (CFGD, UnknownObj) External (ECST, MethodObj) // Warning: Unknown method, guessing 1 arguments External (HDOS, MethodObj) // Warning: Unknown method, guessing 0 arguments External (HNOT, MethodObj) // Warning: Unknown method, guessing 1 arguments External (PDC0, UnknownObj) External (PDC1, UnknownObj) External (PDC2, UnknownObj) External (PDC3, UnknownObj) External (PDC4, UnknownObj) External (PDC5, UnknownObj) External (PDC6, UnknownObj) External (PDC7, UnknownObj) Name (SP2O, 0x4E) Name (SP1O, 0x164E) Name (IO1B, 0x0600) Name (IO1L, 0x70) Name (IO2B, 0x0680) Name (IO2L, 0x20) Name (IO3B, 0x0290) Name (IO3L, 0x10) Name (SP3O, 0x2E) Name (IO4B, 0x0A20) Name (IO4L, 0x20) Name (MCHB, 0xFED10000) Name (MCHL, 0x4000) Name (EGPB, 0xFED19000) Name (EGPL, 0x1000) Name (DMIB, 0xFED18000) Name (DMIL, 0x1000) Name (IFPB, 0xFED14000) Name (IFPL, 0x1000) Name (PEBS, 0xE0000000) Name (PELN, 0x10000000) Name (TTTB, 0xFED20000) Name (TTTL, 0x00020000) Name (SMBS, 0xEFA0) Name (PBLK, 0x0410) Name (PMBS, 0x0400) Name (PMLN, 0x80) Name (LVL2, 0x0414) Name (LVL3, 0x0415) Name (LVL4, 0x0416) Name (SMIP, 0xB2) Name (GPBS, 0x1180) Name (GPLN, 0x80) Name (APCB, 0xFEC00000) Name (APCL, 0x1000) Name (PM30, 0x0430) Name (SRCB, 0xFED1C000) Name (SRCL, 0x4000) Name (SUSW, 0xFF) Name (HPTB, 0xFED00000) Name (HPTC, 0xFED1F404) Name (ACPH, 0xDE) Name (ASSB, Zero) Name (AOTB, Zero) Name (AAXB, Zero) Name (PEHP, Zero) Name (SHPC, One) Name (PEPM, Zero) Name (PEER, Zero) Name (PECS, Zero) Name (ITKE, Zero) Name (DSSP, Zero) Name (FHPP, One) Name (FMBL, One) Name (FDTP, 0x02) Name (BRF, One) Name (BPH, 0x02) Name (BLC, 0x03) Name (BRFS, 0x04) Name (BPHS, 0x05) Name (BLCT, 0x06) Name (BRF4, 0x07) Name (BEP, 0x08) Name (BBF, 0x09) Name (BOF, 0x0A) Name (BPT, 0x0B) Name (SRAF, 0x0C) Name (WWP, 0x0D) Name (SDOE, 0x0E) Name (TRTP, One) Name (TRTD, 0x02) Name (TRTI, 0x03) Name (GCDD, One) Name (DSTA, 0x0A) Name (DSLO, 0x0C) Name (DSLC, 0x0E) Name (PITS, 0x10) Name (SBCS, 0x12) Name (SALS, 0x13) Name (LSSS, 0x2A) Name (SOOT, 0x35) Name (PDBR, 0x4D) Name (SMBL, 0x10) OperationRegion (PNVS, SystemMemory, 0xBB79BDA4, 0x0100) Field (PNVS, AnyAcc, Lock, Preserve) { SLEP, 8 } OperationRegion (GNVS, SystemMemory, 0xBB79BBA4, 0x0200) Field (GNVS, AnyAcc, Lock, Preserve) { OSYS, 16, SMIF, 8, PRM0, 8, PRM1, 8, SCIF, 8, PRM2, 8, PRM3, 8, LCKF, 8, PRM4, 8, PRM5, 8, P80D, 32, LIDS, 8, PWRS, 8, DBGS, 8, THOF, 8, ACT1, 8, ACTT, 8, PSVT, 8, TC1V, 8, TC2V, 8, TSPV, 8, CRTT, 8, DTSE, 8, DTS1, 8, DTS2, 8, DTSF, 8, Offset (0x25), REVN, 8, Offset (0x28), APIC, 8, TCNT, 8, PCP0, 8, PCP1, 8, PPCM, 8, PPMF, 32, Offset (0x32), NATP, 8, CMAP, 8, CMBP, 8, LPTP, 8, FDCP, 8, CMCP, 8, CIRP, 8, SMSC, 8, W381, 8, SMC1, 8, IGDS, 8, TLST, 8, CADL, 8, PADL, 8, CSTE, 16, NSTE, 16, SSTE, 16, NDID, 8, DID1, 32, DID2, 32, DID3, 32, DID4, 32, DID5, 32, KSV0, 32, KSV1, 8, Offset (0x67), BLCS, 8, BRTL, 8, ALSE, 8, ALAF, 8, LLOW, 8, LHIH, 8, Offset (0x6E), EMAE, 8, EMAP, 16, EMAL, 16, Offset (0x74), MEFE, 8, DSTS, 8, Offset (0x78), Offset (0x7A), MORD, 8, TCGP, 8, PPRP, 32, PPRQ, 8, LPPR, 8, GTF0, 56, GTF2, 56, IDEM, 8, GTF1, 56, BID, 8, Offset (0xAA), ASLB, 32, IBTT, 8, IPAT, 8, ITVF, 8, ITVM, 8, IPSC, 8, IBLC, 8, IBIA, 8, ISSC, 8, I409, 8, I509, 8, I609, 8, I709, 8, IPCF, 8, IDMS, 8, IF1E, 8, HVCO, 8, NXD1, 32, NXD2, 32, NXD3, 32, NXD4, 32, NXD5, 32, NXD6, 32, NXD7, 32, NXD8, 32, GSMI, 8, PAVP, 8, Offset (0xE1), OSCC, 8, NEXP, 8, SDGV, 8, SDDV, 8, Offset (0xEB), DSEN, 8, ECON, 8, GPIC, 8, CTYP, 8, L01C, 8, VFN0, 8, VFN1, 8, Offset (0x100), NVGA, 32, NVHA, 32, AMDA, 32, DID6, 32, DID7, 32, DID8, 32, EBAS, 32, CPSP, 32, EECP, 32, EVCP, 32, XBAS, 32, OBS1, 32, OBS2, 32, OBS3, 32, OBS4, 32, OBS5, 32, OBS6, 32, OBS7, 32, OBS8, 32, Offset (0x157), ATMC, 8, PTMC, 8, ATRA, 8, PTRA, 8, PNHM, 32, TBAB, 32, TBAH, 32, RTIP, 8, TSOD, 8, ATPC, 8, PTPC, 8, PFLV, 8, BREV, 8, DPBM, 8, DPCM, 8, DPDM, 8, ALFP, 8, IMON, 8, Offset (0x1F4), NVDD, 16, NVDS, 8, Offset (0x1FE), TMAX, 8 } Scope (_SB) { Name (PR00, Package (0x2B) { Package (0x04) { 0x0001FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0001FFFF, One, LNKB, Zero }, Package (0x04) { 0x0001FFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x0001FFFF, 0x03, LNKD, Zero }, Package (0x04) { 0x0002FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x001FFFFF, Zero, LNKF, Zero }, Package (0x04) { 0x001FFFFF, One, LNKD, Zero }, Package (0x04) { 0x001FFFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x001FFFFF, 0x03, LNKA, Zero }, Package (0x04) { 0x001DFFFF, Zero, LNKH, Zero }, Package (0x04) { 0x001DFFFF, One, LNKD, Zero }, Package (0x04) { 0x001DFFFF, 0x02, LNKA, Zero }, Package (0x04) { 0x001DFFFF, 0x03, LNKC, Zero }, Package (0x04) { 0x001AFFFF, Zero, LNKA, Zero }, Package (0x04) { 0x001AFFFF, One, LNKF, Zero }, Package (0x04) { 0x001AFFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x001AFFFF, 0x03, LNKD, Zero }, Package (0x04) { 0x001BFFFF, Zero, LNKG, Zero }, Package (0x04) { 0x001CFFFF, Zero, LNKA, Zero }, Package (0x04) { 0x001CFFFF, One, LNKB, Zero }, Package (0x04) { 0x001CFFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x001CFFFF, 0x03, LNKD, Zero }, Package (0x04) { 0x0019FFFF, Zero, LNKE, Zero }, Package (0x04) { 0x0016FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0016FFFF, One, LNKD, Zero }, Package (0x04) { 0x0016FFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x0016FFFF, 0x03, LNKB, Zero }, Package (0x04) { 0x0003FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0003FFFF, One, LNKB, Zero }, Package (0x04) { 0x0003FFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x0003FFFF, 0x03, LNKD, Zero }, Package (0x04) { 0x0004FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0004FFFF, One, LNKB, Zero }, Package (0x04) { 0x0004FFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x0004FFFF, 0x03, LNKD, Zero }, Package (0x04) { 0x0005FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0005FFFF, One, LNKB, Zero }, Package (0x04) { 0x0005FFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x0005FFFF, 0x03, LNKD, Zero }, Package (0x04) { 0x0006FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0006FFFF, One, LNKB, Zero }, Package (0x04) { 0x0006FFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x0006FFFF, 0x03, LNKD, Zero } }) Name (AR00, Package (0x2B) { Package (0x04) { 0x0001FFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x0001FFFF, One, Zero, 0x11 }, Package (0x04) { 0x0001FFFF, 0x02, Zero, 0x12 }, Package (0x04) { 0x0001FFFF, 0x03, Zero, 0x13 }, Package (0x04) { 0x0002FFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x001FFFFF, Zero, Zero, 0x15 }, Package (0x04) { 0x001FFFFF, One, Zero, 0x13 }, Package (0x04) { 0x001FFFFF, 0x02, Zero, 0x12 }, Package (0x04) { 0x001FFFFF, 0x03, Zero, 0x10 }, Package (0x04) { 0x001DFFFF, Zero, Zero, 0x17 }, Package (0x04) { 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(0x04) { 0xFFFF, Zero, Zero, 0x12 }, Package (0x04) { 0xFFFF, One, Zero, 0x13 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x10 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x11 } }) Name (PR8F, Package (0x04) { Package (0x04) { 0xFFFF, Zero, LNKD, Zero }, Package (0x04) { 0xFFFF, One, LNKA, Zero }, Package (0x04) { 0xFFFF, 0x02, LNKB, Zero }, Package (0x04) { 0xFFFF, 0x03, LNKC, Zero } }) Name (AR8F, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x13 }, Package (0x04) { 0xFFFF, One, Zero, 0x10 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x11 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x12 } }) Name (PR81, Package (0x14) { Package (0x04) { 0x0003FFFF, Zero, LNKD, Zero }, Package (0x04) { 0x0003FFFF, One, LNKC, Zero }, Package (0x04) { 0x0003FFFF, 0x02, LNKF, Zero }, Package (0x04) { 0x0003FFFF, 0x03, LNKG, Zero }, Package (0x04) { 0x0002FFFF, Zero, LNKC, Zero }, Package (0x04) { 0x0002FFFF, One, LNKD, Zero }, Package (0x04) { 0x0002FFFF, 0x02, LNKB, Zero }, Package (0x04) { 0x0002FFFF, 0x03, LNKA, Zero }, Package (0x04) { 0xFFFF, Zero, LNKF, Zero }, Package (0x04) { 0xFFFF, One, LNKG, Zero }, Package (0x04) { 0xFFFF, 0x02, LNKH, Zero }, Package (0x04) { 0xFFFF, 0x03, LNKE, Zero }, Package (0x04) { 0x0001FFFF, Zero, LNKG, Zero }, Package (0x04) { 0x0001FFFF, One, LNKF, Zero }, Package (0x04) { 0x0001FFFF, 0x02, LNKE, Zero }, Package (0x04) { 0x0001FFFF, 0x03, LNKH, Zero }, Package (0x04) { 0x0005FFFF, Zero, LNKC, Zero }, Package (0x04) { 0x0005FFFF, One, LNKE, Zero }, Package (0x04) { 0x0005FFFF, 0x02, LNKG, Zero }, Package (0x04) { 0x0005FFFF, 0x03, LNKF, Zero } }) Name (AR81, Package (0x14) { Package (0x04) { 0x0003FFFF, Zero, Zero, 0x13 }, Package (0x04) { 0x0003FFFF, One, Zero, 0x12 }, Package (0x04) { 0x0003FFFF, 0x02, Zero, 0x15 }, Package (0x04) { 0x0003FFFF, 0x03, Zero, 0x16 }, Package (0x04) { 0x0002FFFF, Zero, Zero, 0x12 }, Package (0x04) { 0x0002FFFF, One, Zero, 0x13 }, Package (0x04) { 0x0002FFFF, 0x02, Zero, 0x11 }, Package (0x04) { 0x0002FFFF, 0x03, Zero, 0x10 }, Package (0x04) { 0xFFFF, Zero, Zero, 0x15 }, Package (0x04) { 0xFFFF, One, Zero, 0x16 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x17 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x14 }, Package (0x04) { 0x0001FFFF, Zero, Zero, 0x16 }, Package (0x04) { 0x0001FFFF, One, Zero, 0x15 }, Package (0x04) { 0x0001FFFF, 0x02, Zero, 0x14 }, Package (0x04) { 0x0001FFFF, 0x03, Zero, 0x17 }, Package (0x04) { 0x0005FFFF, Zero, Zero, 0x12 }, Package (0x04) { 0x0005FFFF, One, Zero, 0x14 }, Package (0x04) { 0x0005FFFF, 0x02, Zero, 0x16 }, Package (0x04) { 0x0005FFFF, 0x03, Zero, 0x15 } }) Name (PRSA, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,10,11,12,14,15} }) Alias (PRSA, PRSB) Alias (PRSA, PRSC) Alias (PRSA, PRSD) Alias (PRSA, PRSE) Alias (PRSA, PRSF) Alias (PRSA, PRSG) Alias (PRSA, PRSH) Device (PCI0) { Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID Name (_ADR, Zero) // _ADR: Address Method (^BN00, 0, NotSerialized) { Return (Zero) } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BN00 ()) } Name (_UID, Zero) // _UID: Unique ID Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR00 ()) } Return (PR00 ()) } OperationRegion (HBUS, PCI_Config, 0x40, 0xC0) Field (HBUS, DWordAcc, NoLock, Preserve) { EPEN, 1, , 11, EPBR, 20, Offset (0x08), MHEN, 1, , 13, MHBR, 18, Offset (0x10), IIEN, 1, , 11, DIBI, 20, Offset (0x28), DIEN, 1, , 11, DIBR, 20, Offset (0x30), IPEN, 1, , 11, IPBR, 20, Offset (0x62), TUUD, 16, Offset (0x70), , 4, TLUD, 12, Offset (0x89), , 3, GTSE, 1, Offset (0x8A) } OperationRegion (MCHT, SystemMemory, 0xFED10000, 0x1100) Field (MCHT, ByteAcc, NoLock, Preserve) { Offset (0xD40), ADVE, 1, , 11, ADVT, 20, Offset (0x101E), T0IS, 16, Offset (0x105E), T1IS, 16, Offset (0x10EF), ESCS, 8 } Name (BUF0, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FE, // Range Maximum 0x0000, // Translation Offset 0x00FF, // Length ,, _Y00) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000CF7, // Range Maximum 0x00000000, // Translation Offset 0x00000CF8, // Length ,, , TypeStatic) IO (Decode16, 0x0CF8, // Range Minimum 0x0CF8, // Range Maximum 0x01, // Alignment 0x08, // Length ) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000D00, // Range Minimum 0x0000FFFF, // Range Maximum 0x00000000, // Translation Offset 0x0000F300, // Length ,, , TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000A0000, // Range Minimum 0x000BFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00020000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C0000, // Range Minimum 0x000C3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y01, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C4000, // Range Minimum 0x000C7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y02, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C8000, // Range Minimum 0x000CBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y03, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000CC000, // Range Minimum 0x000CFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y04, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D0000, // Range Minimum 0x000D3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y05, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D4000, // Range Minimum 0x000D7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y06, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D8000, // Range Minimum 0x000DBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y07, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000DC000, // Range Minimum 0x000DFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y08, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E0000, // Range Minimum 0x000E3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y09, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E4000, // Range Minimum 0x000E7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y0A, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E8000, // Range Minimum 0x000EBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y0B, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000EC000, // Range Minimum 0x000EFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y0C, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000F0000, // Range Minimum 0x000FFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00010000, // Length ,, _Y0D, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0xFEAFFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, _Y0E, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0xFED40000, // Range Minimum 0xFED44FFF, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { CreateWordField (BUF0, \_SB.PCI0._Y00._MAX, PBMX) // _MAX: Maximum Base Address PBMX = ((PELN >> 0x14) - 0x02) CreateWordField (BUF0, \_SB.PCI0._Y00._LEN, PBLN) // _LEN: Length PBLN = ((PELN >> 0x14) - One) If (^^CPBG.IMCH.PM1L) { CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C0LN) // _LEN: Length C0LN = Zero } If (^^CPBG.IMCH.PM1L == One) { CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C0RW) // _RW_: Read-Write Status C0RW = Zero } If (^^CPBG.IMCH.PM1H) { CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C4LN) // _LEN: Length C4LN = Zero } If (^^CPBG.IMCH.PM1H == One) { CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C4RW) // _RW_: Read-Write Status C4RW = Zero } If (^^CPBG.IMCH.PM2L) { CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, C8LN) // _LEN: Length C8LN = Zero } If (^^CPBG.IMCH.PM2L == One) { CreateBitField (BUF0, \_SB.PCI0._Y03._RW, C8RW) // _RW_: Read-Write Status C8RW = Zero } If (^^CPBG.IMCH.PM2H) { CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, CCLN) // _LEN: Length CCLN = Zero } If (^^CPBG.IMCH.PM2H == One) { CreateBitField (BUF0, \_SB.PCI0._Y04._RW, CCRW) // _RW_: Read-Write Status CCRW = Zero } If (^^CPBG.IMCH.PM3L) { CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D0LN) // _LEN: Length D0LN = Zero } If (^^CPBG.IMCH.PM3L == One) { CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D0RW) // _RW_: Read-Write Status D0RW = Zero } If (^^CPBG.IMCH.PM3H) { CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D4LN) // _LEN: Length D4LN = Zero } If (^^CPBG.IMCH.PM3H == One) { CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D4RW) // _RW_: Read-Write Status D4RW = Zero } If (^^CPBG.IMCH.PM4L) { CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, D8LN) // _LEN: Length D8LN = Zero } If (^^CPBG.IMCH.PM4L == One) { CreateBitField (BUF0, \_SB.PCI0._Y07._RW, D8RW) // _RW_: Read-Write Status D8RW = Zero } If (^^CPBG.IMCH.PM4H) { CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, DCLN) // _LEN: Length DCLN = Zero } If (^^CPBG.IMCH.PM4H == One) { CreateBitField (BUF0, \_SB.PCI0._Y08._RW, DCRW) // _RW_: Read-Write Status DCRW = Zero } If (^^CPBG.IMCH.PM5L) { CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E0LN) // _LEN: Length E0LN = Zero } If (^^CPBG.IMCH.PM5L == One) { CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E0RW) // _RW_: Read-Write Status E0RW = Zero } If (^^CPBG.IMCH.PM5H) { CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E4LN) // _LEN: Length E4LN = Zero } If (^^CPBG.IMCH.PM5H == One) { CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E4RW) // _RW_: Read-Write Status E4RW = Zero } If (^^CPBG.IMCH.PM6L) { CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, E8LN) // _LEN: Length E8LN = Zero } If (^^CPBG.IMCH.PM6L == One) { CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, E8RW) // _RW_: Read-Write Status E8RW = Zero } If (^^CPBG.IMCH.PM6H) { CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, ECLN) // _LEN: Length ECLN = Zero } If (^^CPBG.IMCH.PM6H == One) { CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, ECRW) // _RW_: Read-Write Status ECRW = Zero } If (^^CPBG.IMCH.PM0H) { CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, F0LN) // _LEN: Length F0LN = Zero } If (^^CPBG.IMCH.PM0H == One) { CreateBitField (BUF0, \_SB.PCI0._Y0D._RW, F0RW) // _RW_: Read-Write Status F0RW = Zero } CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M1MN) // _MIN: Minimum Base Address CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M1MX) // _MAX: Maximum Base Address CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M1LN) // _LEN: Length If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { If (PNHM >= 0x000106E1) { Local0 = ^IO10.TOLM /* \_SB_.PCI0.IO10.TOLM */ M1MN = (Local0++ << 0x1A) } Else { Local0 = ^IIO0.TOLM /* \_SB_.PCI0.IIO0.TOLM */ M1MN = (Local0++ << 0x1A) } } Else { M1MN = (TLUD << 0x14) } M1LN = ((M1MX - M1MN) + One) Return (BUF0) /* \_SB_.PCI0.BUF0 */ } Name (GUID, ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */) Name (SUPP, Zero) Name (CTRL, Zero) Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities { Local0 = Arg3 CreateDWordField (Local0, Zero, CDW1) CreateDWordField (Local0, 0x04, CDW2) CreateDWordField (Local0, 0x08, CDW3) If ((Arg0 == GUID) && NEXP) { SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ If (~(CDW1 & One)) { If (CTRL & 0x02) { NHPG () } If (CTRL & 0x04) { NPME () } } If (Arg1 != One) { CDW1 |= 0x08 } If (CDW3 != CTRL) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI0.CTRL */ OSCC = CTRL /* \_SB_.PCI0.CTRL */ Return (Local0) } Else { CDW1 |= 0x04 Return (Local0) } } Scope (\_SB.PCI0) { Method (AR00, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (AR80) /* \_SB_.AR80 */ } Else { Return (^^AR00) /* \_SB_.AR00 */ } } Method (PR00, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (PR80) /* \_SB_.PR80 */ } Else { Return (^^PR00) /* \_SB_.PR00 */ } } Method (AR01, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (AR81) /* \_SB_.AR81 */ } Else { Return (^^AR01) /* \_SB_.AR01 */ } } Method (PR01, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (PR81) /* \_SB_.PR81 */ } Else { Return (^^PR01) /* \_SB_.PR01 */ } } Method (AR02, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (AR82) /* \_SB_.AR82 */ } Else { Return (^^AR02) /* \_SB_.AR02 */ } } Method (PR02, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (PR82) /* \_SB_.PR82 */ } Else { Return (^^PR02) /* \_SB_.PR02 */ } } Method (AR04, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (AR84) /* \_SB_.AR84 */ } Else { Return (^^AR04) /* \_SB_.AR04 */ } } Method (PR04, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (PR84) /* \_SB_.PR84 */ } Else { Return (^^PR04) /* \_SB_.PR04 */ } } Method (AR05, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (AR85) /* \_SB_.AR85 */ } Else { Return (^^AR05) /* \_SB_.AR05 */ } } Method (PR05, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (PR85) /* \_SB_.PR85 */ } Else { Return (^^PR05) /* \_SB_.PR05 */ } } Method (AR06, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (AR86) /* \_SB_.AR86 */ } Else { Return (^^AR06) /* \_SB_.AR06 */ } } Method (PR06, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (PR86) /* \_SB_.PR86 */ } Else { Return (^^PR06) /* \_SB_.PR06 */ } } Method (AR07, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (AR87) /* \_SB_.AR87 */ } Else { Return (^^AR07) /* \_SB_.AR07 */ } } Method (PR07, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (PR87) /* \_SB_.PR87 */ } Else { Return (^^PR07) /* \_SB_.PR07 */ } } Method (AR08, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (AR88) /* \_SB_.AR88 */ } Else { Return (^^AR08) /* \_SB_.AR08 */ } } Method (PR08, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (PR88) /* \_SB_.PR88 */ } Else { Return (^^PR08) /* \_SB_.PR08 */ } } Method (AR0A, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (AR8A) /* \_SB_.AR8A */ } Else { Return (^^AR0A) /* \_SB_.AR0A */ } } Method (PR0A, 0, NotSerialized) { If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { Return (PR8A) /* \_SB_.PR8A */ } Else { Return (^^PR0A) /* \_SB_.PR0A */ } } } Device (P0P2) { Name (_ADR, 0x00010000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR02 ()) } Return (PR02 ()) } Device (PEGP) { Name (_ADR, 0xFFFF) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } } Device (GFX0) { Name (_ADR, 0x00020000) // _ADR: Address Method (PCPC, 0, NotSerialized) { ECST (0x6F) } Method (PAPR, 0, NotSerialized) { If (ECON) {} Else { Return (Zero) } } Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching { DSEN = (Arg0 & 0x07) If ((Arg0 & 0x03) == Zero) { If (CondRefOf (HDOS)) { HDOS () } } } Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices { If (CondRefOf (IDAB)) {} Else { NDID = Zero If (DIDL != Zero) { DID1 = SDDL (DIDL) } If (DDL2 != Zero) { DID2 = SDDL (DDL2) } If (DDL3 != Zero) { DID3 = SDDL (DDL3) } If (DDL4 != Zero) { DID4 = SDDL (DDL4) } If (DDL5 != Zero) { DID5 = SDDL (DDL5) } If (DDL6 != Zero) { DID6 = SDDL (DDL6) } If (DDL7 != Zero) { DID7 = SDDL (DDL7) } If (DDL8 != Zero) { DID8 = SDDL (DDL8) } } If (NDID == One) { Name (TMP1, Package (0x01) { 0xFFFFFFFF }) TMP1 [Zero] = (0x00010000 | DID1) Return (TMP1) /* \_SB_.PCI0.GFX0._DOD.TMP1 */ } If (NDID == 0x02) { Name (TMP2, Package (0x02) { 0xFFFFFFFF, 0xFFFFFFFF }) TMP2 [Zero] = (0x00010000 | DID1) TMP2 [One] = (0x00010000 | DID2) Return (TMP2) /* \_SB_.PCI0.GFX0._DOD.TMP2 */ } If (NDID == 0x03) { Name (TMP3, Package (0x03) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) TMP3 [Zero] = (0x00010000 | DID1) TMP3 [One] = (0x00010000 | DID2) TMP3 [0x02] = (0x00010000 | DID3) Return (TMP3) /* \_SB_.PCI0.GFX0._DOD.TMP3 */ } If (NDID == 0x04) { Name (TMP4, Package (0x04) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) TMP4 [Zero] = (0x00010000 | DID1) TMP4 [One] = (0x00010000 | DID2) TMP4 [0x02] = (0x00010000 | DID3) TMP4 [0x03] = (0x00010000 | DID4) Return (TMP4) /* \_SB_.PCI0.GFX0._DOD.TMP4 */ } If (NDID == 0x05) { Name (TMP5, Package (0x05) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) TMP5 [Zero] = (0x00010000 | DID1) TMP5 [One] = (0x00010000 | DID2) TMP5 [0x02] = (0x00010000 | DID3) TMP5 [0x03] = (0x00010000 | DID4) TMP5 [0x04] = (0x00010000 | DID5) Return (TMP5) /* \_SB_.PCI0.GFX0._DOD.TMP5 */ } If (NDID == 0x06) { Name (TMP6, Package (0x06) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) TMP6 [Zero] = (0x00010000 | DID1) TMP6 [One] = (0x00010000 | DID2) TMP6 [0x02] = (0x00010000 | DID3) TMP6 [0x03] = (0x00010000 | DID4) TMP6 [0x04] = (0x00010000 | DID5) TMP6 [0x05] = (0x00010000 | DID6) Return (TMP6) /* \_SB_.PCI0.GFX0._DOD.TMP6 */ } If (NDID == 0x07) { Name (TMP7, Package (0x07) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) TMP7 [Zero] = (0x00010000 | DID1) TMP7 [One] = (0x00010000 | DID2) TMP7 [0x02] = (0x00010000 | DID3) TMP7 [0x03] = (0x00010000 | DID4) TMP7 [0x04] = (0x00010000 | DID5) TMP7 [0x05] = (0x00010000 | DID6) TMP7 [0x06] = (0x00010000 | DID7) Return (TMP7) /* \_SB_.PCI0.GFX0._DOD.TMP7 */ } If (NDID == 0x08) { Name (TMP8, Package (0x08) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) TMP8 [Zero] = (0x00010000 | DID1) TMP8 [One] = (0x00010000 | DID2) TMP8 [0x02] = (0x00010000 | DID3) TMP8 [0x03] = (0x00010000 | DID4) TMP8 [0x04] = (0x00010000 | DID5) TMP8 [0x05] = (0x00010000 | DID6) TMP8 [0x06] = (0x00010000 | DID7) TMP8 [0x07] = (0x00010000 | DID8) Return (TMP8) /* \_SB_.PCI0.GFX0._DOD.TMP8 */ } Return (Package (0x01) { 0x0400 }) } Device (DD01) { Method (_ADR, 0, Serialized) // _ADR: Address { If (DID1 == Zero) { Return (One) } Else { Return ((0xFFFF & DID1)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { Return (CDDS (DID1)) } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD1) /* \NXD1 */ } Return (NDDS (DID1)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If ((Arg0 & 0xC0000000) == 0xC0000000) { CSTE = NSTE /* \NSTE */ } } } Device (DD02) { Method (_ADR, 0, Serialized) // _ADR: Address { If (DID2 == Zero) { Return (0x02) } Else { Return ((0xFFFF & DID2)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (LIDS == Zero) { Return (Zero) } Return (CDDS (DID2)) } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD2) /* \NXD2 */ } Return (NDDS (DID2)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If ((Arg0 & 0xC0000000) == 0xC0000000) { CSTE = NSTE /* \NSTE */ } } Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels { Return (Package (0x17) { 0x50, 0x46, Zero, 0x05, 0x0A, 0x0F, 0x14, 0x19, 0x1E, 0x23, 0x28, 0x2D, 0x32, 0x37, 0x3C, 0x41, 0x46, 0x4B, 0x50, 0x55, 0x5A, 0x5F, 0x64 }) } Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method { If ((Arg0 >= Zero) && (Arg0 <= 0x64)) { Local0 = ((Arg0 * 0x70) / 0x64) Local0 += 0x05 ^^^LPCB.EC0.BRTS = Local0 ^^^LPCB.EC0.BCLV = Arg0 If (^^^LPCB.EC0.APPE) { If (^^^LPCB.EC0.OSDE) { Notify (FAPP, 0x80) // Status Change } Else { Notify (FAPP, 0x82) // Device-Specific Change } } ^^^LPCB.EC0.OSDE = Zero } } Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current { Local0 = ^^^LPCB.EC0.BCLV /* \_SB_.PCI0.LPCB.EC0_.BCLV */ If ((Local0 >= Zero) && (Local0 <= 0x64)) { Return (Local0) } Return (0x50) } } Device (DD03) { Method (_ADR, 0, Serialized) // _ADR: Address { If (DID3 == Zero) { Return (0x03) } Else { Return ((0xFFFF & DID3)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (DID3 == Zero) { Return (0x0B) } Else { Return (CDDS (DID3)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD3) /* \NXD3 */ } Return (NDDS (DID3)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If ((Arg0 & 0xC0000000) == 0xC0000000) { CSTE = NSTE /* \NSTE */ } } } Device (DD04) { Method (_ADR, 0, Serialized) // _ADR: Address { If (DID4 == Zero) { Return (0x04) } Else { Return ((0xFFFF & DID4)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (DID4 == Zero) { Return (0x0B) } Else { Return (CDDS (DID4)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD4) /* \NXD4 */ } Return (NDDS (DID4)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If ((Arg0 & 0xC0000000) == 0xC0000000) { CSTE = NSTE /* \NSTE */ } } } Device (DD05) { Method (_ADR, 0, Serialized) // _ADR: Address { If (DID5 == Zero) { Return (0x05) } Else { Return ((0xFFFF & DID5)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (DID5 == Zero) { Return (0x0B) } Else { Return (CDDS (DID5)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD5) /* \NXD5 */ } Return (NDDS (DID5)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If ((Arg0 & 0xC0000000) == 0xC0000000) { CSTE = NSTE /* \NSTE */ } } } Device (DD06) { Method (_ADR, 0, Serialized) // _ADR: Address { If (DID6 == Zero) { Return (0x06) } Else { Return ((0xFFFF & DID6)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (DID6 == Zero) { Return (0x0B) } Else { Return (CDDS (DID6)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD6) /* \NXD6 */ } Return (NDDS (DID6)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If ((Arg0 & 0xC0000000) == 0xC0000000) { CSTE = NSTE /* \NSTE */ } } } Device (DD07) { Method (_ADR, 0, Serialized) // _ADR: Address { If (DID7 == Zero) { Return (0x07) } Else { Return ((0xFFFF & DID7)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (DID7 == Zero) { Return (0x0B) } Else { Return (CDDS (DID7)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD7) /* \NXD7 */ } Return (NDDS (DID7)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If ((Arg0 & 0xC0000000) == 0xC0000000) { CSTE = NSTE /* \NSTE */ } } } Device (DD08) { Method (_ADR, 0, Serialized) // _ADR: Address { If (DID8 == Zero) { Return (0x08) } Else { Return ((0xFFFF & DID8)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (DID8 == Zero) { Return (0x0B) } Else { Return (CDDS (DID8)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD8) /* \NXD8 */ } Return (NDDS (DID8)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If ((Arg0 & 0xC0000000) == 0xC0000000) { CSTE = NSTE /* \NSTE */ } } } Method (SDDL, 1, NotSerialized) { NDID++ Local0 = (Arg0 & 0x0F0F) Local1 = (0x80000000 | Local0) If (DIDL == Local0) { Return (Local1) } If (DDL2 == Local0) { Return (Local1) } If (DDL3 == Local0) { Return (Local1) } If (DDL4 == Local0) { Return (Local1) } If (DDL5 == Local0) { Return (Local1) } If (DDL6 == Local0) { Return (Local1) } If (DDL7 == Local0) { Return (Local1) } If (DDL8 == Local0) { Return (Local1) } Return (Zero) } Method (CDDS, 1, NotSerialized) { Local0 = (Arg0 & 0x0F0F) If (Zero == Local0) { Return (0x1D) } If (CADL == Local0) { Return (0x1F) } If (CAL2 == Local0) { Return (0x1F) } If (CAL3 == Local0) { Return (0x1F) } If (CAL4 == Local0) { Return (0x1F) } If (CAL5 == Local0) { Return (0x1F) } If (CAL6 == Local0) { Return (0x1F) } If (CAL7 == Local0) { Return (0x1F) } If (CAL8 == Local0) { Return (0x1F) } Return (0x1D) } Method (NDDS, 1, NotSerialized) { Local0 = (Arg0 & 0x0F0F) If (Zero == Local0) { Return (Zero) } If (NADL == Local0) { Return (One) } If (NDL2 == Local0) { Return (One) } If (NDL3 == Local0) { Return (One) } If (NDL4 == Local0) { Return (One) } If (NDL5 == Local0) { Return (One) } If (NDL6 == Local0) { Return (One) } If (NDL7 == Local0) { Return (One) } If (NDL8 == Local0) { Return (One) } Return (Zero) } Scope (^^PCI0) { OperationRegion (MCHP, PCI_Config, 0x40, 0xC0) Field (MCHP, AnyAcc, NoLock, Preserve) { Offset (0x60), TASM, 10, Offset (0x62) } } OperationRegion (IGDP, PCI_Config, 0x40, 0xC0) Field (IGDP, AnyAcc, NoLock, Preserve) { Offset (0x12), , 1, GIVD, 1, , 2, GUMA, 3, Offset (0x14), , 4, GMFN, 1, Offset (0x18), Offset (0xA4), ASLE, 8, Offset (0xA8), GSSE, 1, GSSB, 14, GSES, 1, Offset (0xB0), , 12, CDVL, 1, Offset (0xB2), Offset (0xB5), LBPC, 8, Offset (0xBC), ASLS, 32 } OperationRegion (IGDM, SystemMemory, ASLB, 0x2000) Field (IGDM, AnyAcc, NoLock, Preserve) { SIGN, 128, SIZE, 32, OVER, 32, SVER, 256, VVER, 128, GVER, 128, MBOX, 32, DMOD, 32, Offset (0x100), DRDY, 32, CSTS, 32, CEVT, 32, Offset (0x120), DIDL, 32, DDL2, 32, DDL3, 32, DDL4, 32, DDL5, 32, DDL6, 32, DDL7, 32, DDL8, 32, CPDL, 32, CPL2, 32, CPL3, 32, CPL4, 32, CPL5, 32, CPL6, 32, CPL7, 32, CPL8, 32, CADL, 32, CAL2, 32, CAL3, 32, CAL4, 32, CAL5, 32, CAL6, 32, CAL7, 32, CAL8, 32, NADL, 32, NDL2, 32, NDL3, 32, NDL4, 32, NDL5, 32, NDL6, 32, NDL7, 32, NDL8, 32, ASLP, 32, TIDX, 32, CHPD, 32, CLID, 32, CDCK, 32, SXSW, 32, EVTS, 32, CNOT, 32, NRDY, 32, Offset (0x200), SCIE, 1, GEFC, 4, GXFC, 3, GESF, 8, Offset (0x204), PARM, 32, DSLP, 32, Offset (0x300), ARDY, 32, ASLC, 32, TCHE, 32, ALSI, 32, BCLP, 32, PFIT, 32, CBLV, 32, BCLM, 320, CPFM, 32, EPFM, 32, PLUT, 592, PFMB, 32, CCDV, 32, PCFT, 32, Offset (0x400), GVD1, 49152, PHED, 32, BDDC, 2048 } Name (DBTB, Package (0x15) { Zero, 0x07, 0x38, 0x01C0, 0x0E00, 0x3F, 0x01C7, 0x0E07, 0x01F8, 0x0E38, 0x0FC0, Zero, Zero, Zero, Zero, Zero, 0x7000, 0x7007, 0x7038, 0x71C0, 0x7E00 }) Name (CDCT, Package (0x05) { Package (0x02) { 0xE4, 0x0140 }, Package (0x02) { 0xDE, 0x014D }, Package (0x02) { 0xDE, 0x014D }, Package (0x02) { Zero, Zero }, Package (0x02) { 0xDE, 0x014D } }) Name (SUCC, One) Name (NVLD, 0x02) Name (CRIT, 0x04) Name (NCRT, 0x06) Method (GSCI, 0, Serialized) { Method (GBDA, 0, Serialized) { If (GESF == Zero) { PARM = 0x0679 GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == One) { PARM = 0x0240 GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x04) { PARM &= 0xEFFF0000 PARM &= (DerefOf (DBTB [IBTT]) << 0x10) PARM |= IBTT /* \_SB_.PCI0.GFX0.PARM */ GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x05) { PARM = IPSC /* \IPSC */ PARM |= (IPAT << 0x08) PARM += 0x0100 PARM |= (LIDS << 0x10) PARM += 0x00010000 PARM |= (IBIA << 0x14) GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x06) { PARM = ITVF /* \ITVF */ PARM |= (ITVM << 0x04) GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x07) { PARM = GIVD /* \_SB_.PCI0.GFX0.GIVD */ PARM ^= One PARM |= (GMFN << One) PARM |= 0x1800 PARM |= (IDMS << 0x11) PARM |= (DerefOf (DerefOf (CDCT [HVCO]) [CDVL]) << 0x15) /* \_SB_.PCI0.GFX0.PARM */ GESF = One Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x0A) { PARM = Zero If (ISSC) { PARM |= 0x03 } GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x0B) { PARM = KSV0 /* \KSV0 */ GESF = KSV1 /* \KSV1 */ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } GESF = Zero Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */ } Method (SBCB, 0, Serialized) { If (GESF == Zero) { PARM = Zero PARM = 0x000F87FD GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == One) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x03) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x04) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x05) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x06) { ITVF = (PARM & 0x0F) ITVM = ((PARM & 0xF0) >> 0x04) GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x07) { If (PARM == Zero) { Local0 = CLID /* \_SB_.PCI0.GFX0.CLID */ If (0x80000000 & Local0) { CLID &= 0x0F GLID (CLID) } } GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x08) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x09) { IBTT = (PARM & 0xFF) GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x0A) { IPSC = (PARM & 0xFF) If ((PARM >> 0x08) & 0xFF) { IPAT = ((PARM >> 0x08) & 0xFF) IPAT-- } IBIA = ((PARM >> 0x14) & 0x07) GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x0B) { IF1E = ((PARM >> One) & One) If (PARM & 0x0001E000) { IDMS = ((PARM >> 0x0D) & 0x0F) } Else { IDMS = ((PARM >> 0x11) & 0x0F) } GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x10) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x11) { PARM = (LIDS << 0x08) PARM += 0x0100 GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x12) { If (PARM & One) { If ((PARM >> One) == One) { ISSC = One } Else { GESF = Zero Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */ } } Else { ISSC = Zero } GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x13) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GESF == 0x14) { PAVP = (PARM & 0x0F) GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If (GEFC == 0x04) { GXFC = GBDA () } If (GEFC == 0x06) { GXFC = SBCB () } GEFC = Zero SCIS = One GSSE = Zero SCIE = Zero Return (Zero) } Method (PDRD, 0, NotSerialized) { If (!DRDY) { Sleep (ASLP) } Return (!DRDY) } Method (PSTS, 0, NotSerialized) { If (CSTS > 0x02) { Sleep (ASLP) } Return ((CSTS == 0x03)) } Method (GNOT, 2, NotSerialized) { If (PDRD ()) { Return (One) } CEVT = Arg0 CSTS = 0x03 If ((CHPD == Zero) && (Arg1 == Zero)) { If ((OSYS > 0x07D0) || (OSYS < 0x07D6)) { Notify (PCI0, Arg1) } Else { Notify (GFX0, Arg1) } } If (CondRefOf (HNOT)) { HNOT (Arg0) } Else { Notify (GFX0, 0x80) // Status Change } Return (Zero) } Method (GHDS, 1, NotSerialized) { TIDX = Arg0 Return (GNOT (One, Zero)) } Method (GLID, 1, NotSerialized) { CLID = Arg0 Return (GNOT (0x02, Zero)) } Method (GDCK, 1, NotSerialized) { CDCK = Arg0 Return (GNOT (0x04, Zero)) } Method (PARD, 0, NotSerialized) { If (!ARDY) { Sleep (ASLP) } Return (!ARDY) } Method (AINT, 2, NotSerialized) { If (!(TCHE & (One << Arg0))) { Return (One) } If (PARD ()) { Return (One) } If (Arg0 == 0x02) { If (CPFM) { Local0 = (CPFM & 0x0F) Local1 = (EPFM & 0x0F) If (Local0 == One) { If (Local1 & 0x06) { PFIT = 0x06 } ElseIf (Local1 & 0x08) { PFIT = 0x08 } Else { PFIT = One } } If (Local0 == 0x06) { If (Local1 & 0x08) { PFIT = 0x08 } ElseIf (Local1 & One) { PFIT = One } Else { PFIT = 0x06 } } If (Local0 == 0x08) { If (Local1 & One) { PFIT = One } ElseIf (Local1 & 0x06) { PFIT = 0x06 } Else { PFIT = 0x08 } } } Else { PFIT ^= 0x07 } PFIT |= 0x80000000 ASLC = 0x04 } ElseIf (Arg0 == One) { BCLP = ((Arg1 * 0xFF) / 0x64) BCLP |= 0x80000000 ASLC = 0x02 } ElseIf (Arg0 == Zero) { ALSI = Arg1 ASLC = One } Else { Return (One) } ASLE = One Return (Zero) } Method (SCIP, 0, NotSerialized) { If (OVER != Zero) { Return (!GSMI) } Return (Zero) } } Device (P0P1) { Name (_ADR, 0x001E0000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0B, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR01 ()) } Return (PR01 ()) } } Device (LPCB) { Name (_ADR, 0x001F0000) // _ADR: Address Scope (\_SB) { Device (TPM) { Name (TMPV, Zero) Method (_HID, 0, NotSerialized) // _HID: Hardware ID { If (TPMV == One) { Return (0x0201D824) } If (TPMV == 0x02) { Return (0x0435CF4D) } If (TPMV == 0x03) { Return (0x02016D08) } If (TPMV == 0x04) { Return (0x01016D08) } If ((TPMV == 0x05) || (TPMV == 0x06)) { Return (0x0010A35C) } If (TPMV == 0x08) { Return (0x00128D06) } If (TPMV == 0x09) { Return ("INTC0102") } Return (0x310CD041) } Name (_CID, EisaId ("PNP0C31")) // _CID: Compatible ID Name (_UID, One) // _UID: Unique ID Method (_STA, 0, Serialized) // _STA: Status { TMPV = TPP3 /* \_SB_.TPP3 */ If (TMPV & TPRS) { Return (0x0F) } Return (Zero) } Name (BUF1, ResourceTemplate () { Memory32Fixed (ReadOnly, 0xFED40000, // Address Base 0x00005000, // Address Length ) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Return (BUF1) /* \_SB_.TPM_.BUF1 */ } Method (UCMP, 2, NotSerialized) { If (0x10 != SizeOf (Arg0)) { Return (Zero) } If (0x10 != SizeOf (Arg1)) { Return (Zero) } Local0 = Zero While (Local0 < 0x10) { If (DerefOf (Arg0 [Local0]) != DerefOf (Arg1 [Local0] )) { Return (Zero) } Local0++ } Return (One) } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (TTMP, Buffer (One) { 0x00 /* . */ }) CreateByteField (TTMP, Zero, TMPV) If (UCMP (Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653") /* Physical Presence Interface */) == One) { If (Arg2 == Zero) { Return (Buffer (One) { 0x7F /* . */ }) } If (Arg2 == One) { Return (Buffer (0x04) { "1.0" }) } If (Arg2 == 0x02) { If (TPRS) { If (DerefOf (Arg3 [Zero]) == Zero) { TPP1 = Zero Return (Zero) } If (DerefOf (Arg3 [Zero]) == One) { TPP1 = One Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x02) { TPP1 = 0x02 Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x03) { TPP1 = 0x03 Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x04) { TPP1 = 0x04 Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x05) { TPP1 = 0x05 Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x06) { TPP1 = 0x06 Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x07) { TPP1 = 0x07 Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x08) { TPP1 = 0x08 Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x09) { TPP1 = 0x09 Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x0A) { TPP1 = 0x0A Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x0B) { TPP1 = 0x0B Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x0C) { TPP1 = 0x0C Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x0D) { TPP1 = 0x0D Return (Zero) } If (DerefOf (Arg3 [Zero]) == 0x0E) { TPP1 = 0x0E Return (Zero) } Return (One) } Return (One) } If (Arg2 == 0x03) { Name (TMP1, Package (0x02) { Zero, 0xFFFFFFFF }) TMPV = TPP1 /* \_SB_.TPP1 */ TMP1 [One] = TMPV &= PPRQ /* \_SB_.PPRQ */ Return (TMP1) /* \_SB_.TPM_._DSM.TMP1 */ } If (Arg2 == 0x04) { Return (One) } If (Arg2 == 0x05) { Name (TMP2, Package (0x03) { Zero, 0xFFFFFFFF, 0xFFFFFFFF }) TMP2 [One] = PPLO /* \_SB_.PPLO */ If (PPLO > 0x0E) { TMP2 [0x02] = 0xFFFFFFF1 Return (TMP2) /* \_SB_.TPM_._DSM.TMP2 */ } TMPV = TPP1 /* \_SB_.TPP1 */ TMPV &= PPRQ /* \_SB_.PPRQ */ If (TMPV == PPRQ) { TMP2 [0x02] = 0xFFFFFFF1 Return (TMP2) /* \_SB_.TPM_._DSM.TMP2 */ } TMPV = TPP3 /* \_SB_.TPP3 */ If (TMPV & PPOR) { TMP2 [0x02] = 0xFFFFFFF0 Return (TMP2) /* \_SB_.TPM_._DSM.TMP2 */ } TMP2 [0x02] = Zero Return (TMP2) /* \_SB_.TPM_._DSM.TMP2 */ } If (Arg2 == 0x06) { CreateByteField (Arg3, 0x04, LAN0) CreateByteField (Arg3, 0x05, LAN1) P80H = ((LAN1 << 0x08) | LAN0) /* \_SB_.TPM_._DSM.LAN0 */ If ((LAN0 == 0x65) || (LAN0 == 0x45)) { If ((LAN1 == 0x6E) || (LAN1 == 0x4E)) { Return (Zero) } } Return (One) } If (Arg2 == 0x07) { If (TPRS) { If (Arg3 == Zero) { TPP1 = Zero Return (Zero) } If (Arg3 == One) { TPP1 = One Return (Zero) } If (Arg3 == 0x02) { TPP1 = 0x02 Return (Zero) } If (Arg3 == 0x03) { TPP1 = 0x03 Return (Zero) } If (Arg3 == 0x04) { TPP1 = 0x04 Return (Zero) } If (Arg3 == 0x05) { TPP1 = 0x05 Return (Zero) } If (Arg3 == 0x06) { TPP1 = 0x06 Return (Zero) } If (Arg3 == 0x07) { TPP1 = 0x07 Return (Zero) } If (Arg3 == 0x08) { TPP1 = 0x08 Return (Zero) } If (Arg3 == 0x09) { TPP1 = 0x09 Return (Zero) } If (Arg3 == 0x0A) { TPP1 = 0x0A Return (Zero) } If (Arg3 == 0x0B) { TPP1 = 0x0B Return (Zero) } If (Arg3 == 0x0C) { TPP1 = 0x0C Return (Zero) } If (Arg3 == 0x0D) { TPP1 = 0x0D Return (Zero) } If (Arg3 == 0x0E) { TPP1 = 0x0E Return (Zero) } Return (One) } Return (One) } Return (One) } If (UCMP (Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")) == One) { If (Arg2 == Zero) { Return (Buffer (One) { 0x01 /* . */ }) } If (Arg2 == One) { If ((DerefOf (Arg3 [Zero]) & 0x10) == Zero) { TMPV = ~TMRD /* \_SB_.TMRD */ TMPV &= TPP3 /* \_SB_.TPP3 */ TPP3 = TMPV /* \_SB_.TPM_._DSM.TMPV */ Return (Zero) } If ((DerefOf (Arg3 [Zero]) & 0x10) == One) { TMPV = TPP3 /* \_SB_.TPP3 */ (TMRD | TMPV) TPP3 = TMPV /* \_SB_.TPM_._DSM.TMPV */ } If (DerefOf (Arg3 [Zero]) == Zero) { TMPV = ~TMOR /* \_SB_.TMOR */ TMPV &= TPP3 /* \_SB_.TPP3 */ TPP3 = TMPV /* \_SB_.TPM_._DSM.TMPV */ Return (Zero) } If (DerefOf (Arg3 [Zero]) == One) { TMPV = TPP3 /* \_SB_.TPP3 */ (TMOR | TMPV) TPP3 = TMPV /* \_SB_.TPM_._DSM.TMPV */ Return (Zero) } } Return (One) } Return (Buffer (One) { 0x00 /* . */ }) } } Scope (\_SB) { OperationRegion (TCG1, SystemMemory, 0xBB79BB9D, 0x00000007) Field (TCG1, AnyAcc, NoLock, Preserve) { SSS1, 8, SSS2, 8, SSS3, 8, SSS4, 8, SSS5, 8, TPMV, 8, MOR, 8 } Name (TCGP, Buffer (0x08) { 0x1F, 0xE0, 0x1F, 0x01, 0x02, 0x04, 0x08, 0x10 /* ........ */ }) CreateByteField (TCGP, Zero, PPRQ) CreateByteField (TCGP, One, PPL1) CreateByteField (TCGP, 0x02, PPRP) CreateByteField (TCGP, 0x03, TPRS) CreateByteField (TCGP, 0x04, PPOR) CreateByteField (TCGP, 0x06, TMOR) CreateByteField (TCGP, 0x07, TMRD) OperationRegion (TCGC, SystemIO, 0x72, 0x02) Field (TCGC, ByteAcc, Lock, Preserve) { TIDX, 8, TPDA, 8 } IndexField (TIDX, TPDA, ByteAcc, Lock, Preserve) { Offset (0x70), TPP1, 8, PPLO, 8, TPP3, 8 } Method (PHSR, 1, Serialized) { BCMD = Arg0 DID = Zero SMIC = Zero If (BCMD == Arg0) {} BCMD = Zero DID = Zero Return (Zero) } OperationRegion (SMI0, SystemIO, 0x0000FE00, 0x00000002) Field (SMI0, AnyAcc, NoLock, Preserve) { SMIC, 8 } OperationRegion (SMI1, SystemMemory, 0xBB79BEBD, 0x00000090) Field (SMI1, AnyAcc, NoLock, Preserve) { BCMD, 8, DID, 32, INFO, 1024 } Field (SMI1, AnyAcc, NoLock, Preserve) { AccessAs (ByteAcc, 0x00), Offset (0x05), INF, 8 } } OperationRegion (PCI0.LPCB.LPC1, PCI_Config, 0x40, 0xC0) Field (PCI0.LPCB.LPC1, AnyAcc, NoLock, Preserve) { Offset (0x20), PARC, 8, PBRC, 8, PCRC, 8, PDRC, 8, Offset (0x28), PERC, 8, PFRC, 8, PGRC, 8, PHRC, 8 } Device (LNKA) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PARC |= 0x80 } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLA, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLA, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PARC & 0x0F)) Return (RTLA) /* \_SB_.LNKA._CRS.RTLA */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PARC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If (PARC & 0x80) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKB) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PBRC |= 0x80 } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLB, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLB, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PBRC & 0x0F)) Return (RTLB) /* \_SB_.LNKB._CRS.RTLB */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PBRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If (PBRC & 0x80) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKC) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x03) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PCRC |= 0x80 } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLC, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLC, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PCRC & 0x0F)) Return (RTLC) /* \_SB_.LNKC._CRS.RTLC */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PCRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If (PCRC & 0x80) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKD) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x04) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PDRC |= 0x80 } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLD, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLD, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PDRC & 0x0F)) Return (RTLD) /* \_SB_.LNKD._CRS.RTLD */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PDRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If (PDRC & 0x80) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKE) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x05) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PERC |= 0x80 } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLE, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLE, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PERC & 0x0F)) Return (RTLE) /* \_SB_.LNKE._CRS.RTLE */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PERC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If (PERC & 0x80) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKF) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x06) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PFRC |= 0x80 } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLF, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLF, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PFRC & 0x0F)) Return (RTLF) /* \_SB_.LNKF._CRS.RTLF */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PFRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If (PFRC & 0x80) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKG) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x07) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PGRC |= 0x80 } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLG, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLG, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PGRC & 0x0F)) Return (RTLG) /* \_SB_.LNKG._CRS.RTLG */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PGRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If (PGRC & 0x80) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKH) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x08) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PHRC |= 0x80 } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLH, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLH, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PHRC & 0x0F)) Return (RTLH) /* \_SB_.LNKH._CRS.RTLH */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PHRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If (PHRC & 0x80) { Return (0x09) } Else { Return (0x0B) } } } } OperationRegion (LPC0, PCI_Config, 0x40, 0xC0) Field (LPC0, AnyAcc, NoLock, Preserve) { Offset (0x40), IOD0, 8, IOD1, 8, Offset (0xB0), RAEN, 1, , 13, RCBA, 18 } OperationRegion (CMS2, SystemIO, 0x72, 0x02) Field (CMS2, ByteAcc, NoLock, Preserve) { IND2, 8, DAT2, 8 } IndexField (IND2, DAT2, ByteAcc, NoLock, Preserve) { Offset (0x6C), BLVL, 16, Offset (0x74), ELUX, 1, WLST, 1, BLTE, 1, WLDP, 1, BLTP, 1, APSP, 1, S4FG, 1, G3GP, 1 } Device (EC0) { Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0062, // Range Minimum 0x0062, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0066, // Range Minimum 0x0066, // Range Maximum 0x00, // Alignment 0x01, // Length ) }) Name (_GPE, 0x17) // _GPE: General Purpose Events Name (ECON, Zero) Name (DONE, Zero) Name (CMON, Zero) Name (OSDE, Zero) Name (BCLV, Zero) Method (_REG, 2, NotSerialized) // _REG: Region Availability { If (Arg0 == 0x03) { If (Arg1 == One) { ECON = One \ECON = One If (P3GP) { G3GP = Zero } RTMP = 0x64 RTMP = TMAX /* \TMAX */ ^^^GFX0.CLID = LIDC /* \_SB_.PCI0.LPCB.EC0_.LIDC */ LIDS = LIDC /* \_SB_.PCI0.LPCB.EC0_.LIDC */ PWRS = ACIN /* \_SB_.PCI0.LPCB.EC0_.ACIN */ TRAP (0x03, 0x2B) PNOT () Notify (AC0, 0x80) // Status Change If ((OSYS > 0x07D0) && (OSYS < 0x07D6)) { If ((BLVL > 0x75FF) || (BLVL < 0x0500)) { BLVL = 0x5FFF } BRTS = (BLVL >> 0x08) } Else { BCLV = 0x50 } } Else { ECON = Zero \ECON = Zero } } } OperationRegion (ECRM, EmbeddedControl, Zero, 0x0100) Field (ECRM, ByteAcc, Lock, Preserve) { Offset (0x12), SYSS, 3, Offset (0x13), RTMP, 8, BRTS, 8, BSTS, 2, , 3, BATI, 1, Offset (0x16), , 2, LCON, 2, Offset (0x18), LEAR, 1, Offset (0x1C), BLUX, 8, TOUC, 1, WIRE, 1, CAME, 1, , 1, AMBL, 1, BLTH, 1, Offset (0x1F), CFAN, 8, Offset (0x24), EN_L, 1, DI_L, 1, Offset (0x25), , 5, FANM, 2, APPE, 1, CTLC, 8, CTLH, 8, CTLL, 8, LUXH, 8, LUXL, 8, Offset (0x31), , 6, LIDC, 1, ACIN, 1, Offset (0x36), G3GS, 8, Offset (0x40), SMBP, 8, SMBS, 8, SMBA, 8, SMBC, 8, SMBD, 256, SMBB, 8, SMBT, 8, SMB0, 8, SMB1, 8, Offset (0xE0), GTMP, 8, Offset (0xFE), TFBL, 1, HWSW, 1, HSWE, 1, HSWS, 1, QRHW, 1, P3GP, 1, CAMS, 1, Offset (0xFF) } Scope (\) { Field (GNVS, AnyAcc, Lock, Preserve) { Offset (0x1E), BNUM, 8, Offset (0x20), B1SC, 8, Offset (0x23), B1SS, 8 } } Name (SRB, 0x07) Name (SRW, 0x09) Name (SRBL, 0x0B) Device (BAT0) { Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID Name (_PCL, Package (0x01) // _PCL: Power Consumer List { _SB }) Method (_STA, 0, NotSerialized) // _STA: Status { If (ECON) { If (BATI) { Return (0x1F) } Else { Return (0x0F) } } Return (0x0F) } Name (BBIF, Package (0x0D) { One, 0x1130, 0x1130, One, 0x2B5C, Zero, Zero, Zero, 0xFFFFFFFF, "S10", "", "LION", "TONGFANG" }) Method (_BIF, 0, NotSerialized) // _BIF: Battery Information { Name (SBUF, Buffer (0x22) {}) CreateByteField (SBUF, Zero, SSTS) CreateByteField (SBUF, One, LENG) CreateByteField (SBUF, 0x02, DATB) CreateWordField (SBUF, 0x02, DATW) CreateField (SBUF, 0x10, 0x0100, BUF1) Name (SMOK, Zero) SMOK = ECON /* \_SB_.PCI0.LPCB.EC0_.ECON */ Name (STR3, Zero) STR3 = STR2 /* \STR2 */ BBIF [0x0C] = STR1 /* \STR1 */ If (STR3 != Zero) { BBIF [0x09] = STR2 /* \STR2 */ } If (SMOK) { SMOK = Zero SBUF = SMBR (SRW, 0x16, 0x18) If (SSTS == Zero) { BBIF [One] = DATW /* \_SB_.PCI0.LPCB.EC0_.BAT0._BIF.DATW */ SMOK = One } } If (SMOK) { SMOK = Zero SBUF = SMBR (SRW, 0x16, 0x10) If (SSTS == Zero) { BBIF [0x02] = DATW /* \_SB_.PCI0.LPCB.EC0_.BAT0._BIF.DATW */ SMOK = One } } If (SMOK) { SMOK = Zero SBUF = SMBR (SRW, 0x16, 0x19) If (SSTS == Zero) { BBIF [0x04] = DATW /* \_SB_.PCI0.LPCB.EC0_.BAT0._BIF.DATW */ SMOK = One } } If (STR3 == Zero) { If (SMOK) { SMOK = Zero SBUF = SMBR (SRBL, 0x16, 0x21) If (SSTS == Zero) { BBIF [0x09] = BUF1 /* \_SB_.PCI0.LPCB.EC0_.BAT0._BIF.BUF1 */ SMOK = One } } } Return (BBIF) /* \_SB_.PCI0.LPCB.EC0_.BAT0.BBIF */ } Name (BBST, Package (0x04) { Zero, 0x03E8, 0x1130, 0x2B5C }) Method (_BST, 0, NotSerialized) // _BST: Battery Status { Name (SBUF, Buffer (0x22) {}) CreateByteField (SBUF, Zero, SSTS) CreateByteField (SBUF, One, LENG) CreateByteField (SBUF, 0x02, DATB) CreateWordField (SBUF, 0x02, DATW) CreateField (SBUF, 0x10, 0x0100, BUF1) Name (SMOK, Zero) SMOK = ECON /* \_SB_.PCI0.LPCB.EC0_.ECON */ If (SMOK) { SMOK = Zero SBUF = SMBR (SRW, 0x16, 0x16) If (SSTS == Zero) { Local0 = BSTS /* \_SB_.PCI0.LPCB.EC0_.BSTS */ If (DATW & 0x10) { Local0 |= 0x04 } BBST [Zero] = Local0 SMOK = One } } If (SMOK) { SMOK = Zero SBUF = SMBR (SRW, 0x16, 0x0B) If (SSTS == Zero) { If (DATW & 0x8000) { Local0 = (~DATW & 0x7FFF) Local0++ } Else { Local0 = (DATW & 0x7FFF) } If (Local0 < 0x0352) { Local0 = 0x0352 } BBST [One] = Local0 SMOK = One } } If (SMOK) { SMOK = Zero SBUF = SMBR (SRW, 0x16, 0x0F) If (SSTS == Zero) { BBST [0x02] = DATW /* \_SB_.PCI0.LPCB.EC0_.BAT0._BST.DATW */ SMOK = One } } If (SMOK) { SMOK = Zero SBUF = SMBR (SRW, 0x16, 0x09) If (SSTS == Zero) { BBST [0x03] = DATW /* \_SB_.PCI0.LPCB.EC0_.BAT0._BST.DATW */ SMOK = One } } Return (BBST) /* \_SB_.PCI0.LPCB.EC0_.BAT0.BBST */ } } If (TBAB != Zero) { OperationRegion (TBLK, SystemMemory, TBAB, 0x4000) Field (TBLK, AnyAcc, NoLock, Preserve) { Offset (0x24), MMCH, 1, MCPU, 1, MBUD, 2, Offset (0x26), Offset (0x50), , 1, MMTL, 7, MGTD, 1, MCTD, 1, MPOL, 2, MGPL, 9, MCPL, 10, Offset (0x54), MMPL, 10, Offset (0x56), MTL, 16, Offset (0x64), MMPC, 16, MPPC, 16, MCPC, 16, Offset (0x98), , 1, NMTL, 7, NGTD, 1, NCTD, 1, NPOL, 2, NGPL, 9, NCPL, 10, Offset (0x9C), Offset (0xA8), Offset (0xAA), TMPL, 10, Offset (0xAC) } } If (TBAB != Zero) { OperationRegion (PTBA, SystemMemory, TBAB, 0x4000) Field (PTBA, AnyAcc, NoLock, Preserve) { Offset (0x1A), PTRC, 16, Offset (0x30), CTV1, 16, CTV2, 16, Offset (0x60), PMCP, 16 } } Field (ECRM, ByteAcc, Lock, Preserve) { Offset (0x44), SDA0, 8, SDA1, 8 } Method (SMBR, 3, NotSerialized) { Name (SBUF, Buffer (0x22) {}) CreateByteField (SBUF, Zero, SSTS) CreateByteField (SBUF, One, SLEN) CreateByteField (SBUF, 0x02, DAT0) CreateByteField (SBUF, 0x03, DAT1) CreateField (SBUF, 0x10, 0x0100, SDAT) If (ECON == Zero) { SSTS = 0xFF Return (SBUF) /* \_SB_.PCI0.LPCB.EC0_.SMBR.SBUF */ } DONE = Zero SMBS = Zero SMBA = Arg1 SMBC = Arg2 Local0 = (Arg0 | One) SMBP = Local0 Local0 = 0x012C While (Local0) { Local0-- Sleep (0x0A) If (SMBP == Zero) { Local0 = Zero } } SSTS = (SMBS & 0x7F) Local0 = (Arg0 | One) If (Local0 == SRB) { DAT0 = SDA0 /* \_SB_.PCI0.LPCB.EC0_.SDA0 */ } ElseIf (Local0 == SRW) { DAT0 = SDA0 /* \_SB_.PCI0.LPCB.EC0_.SDA0 */ DAT1 = SDA1 /* \_SB_.PCI0.LPCB.EC0_.SDA1 */ } ElseIf (Local0 == SRBL) { SDAT = SMBD /* \_SB_.PCI0.LPCB.EC0_.SMBD */ SLEN = SMBB /* \_SB_.PCI0.LPCB.EC0_.SMBB */ Local1 = (SLEN + 0x02) Local2 = One While (Local2) { If (Local1 < 0x22) { SBUF [Local1] = Zero Local1++ } Else { Local2 = Zero } } } Else { SDAT = SMBD /* \_SB_.PCI0.LPCB.EC0_.SMBD */ SLEN = SMBB /* \_SB_.PCI0.LPCB.EC0_.SMBB */ } Return (SBUF) /* \_SB_.PCI0.LPCB.EC0_.SMBR.SBUF */ } Method (_Q01, 0, NotSerialized) // _Qxx: EC Query { DONE = One } Method (_Q10, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x8A) // Device-Specific } } Method (_Q11, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x8B) // Device-Specific } } Method (_Q12, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x8C) // Device-Specific } } Method (_Q13, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x92) // Device-Specific } } Method (_Q16, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x8D) // Device-Specific } } Method (_Q21, 0, NotSerialized) // _Qxx: EC Query { LIDS = LIDC /* \_SB_.PCI0.LPCB.EC0_.LIDC */ ^^^GFX0.CLID = One Sleep (0x05) Notify (LID0, 0x80) // Status Change } Method (_Q22, 0, NotSerialized) // _Qxx: EC Query { Notify (BAT0, 0x80) // Status Change Notify (BAT0, 0x81) // Information Change } Method (_Q20, 0, NotSerialized) // _Qxx: EC Query { PWRS = ACIN /* \_SB_.PCI0.LPCB.EC0_.ACIN */ TRAP (0x03, 0x2B) PNOT () Notify (AC0, 0x80) // Status Change Notify (BAT0, 0x81) // Information Change Notify (BAT0, 0x80) // Status Change If ((OSYS > 0x07D0) && (OSYS < 0x07D6)) { Local0 = 0x0A If (ACIN) { While (Local0) { ALUX (One) Sleep (0x0A) Local0-- } } Else { While (Local0) { ALUX (0x02) Sleep (0x0A) Local0-- } } } If (APPE) { Notify (FAPP, 0x8E) // Device-Specific If ((OSYS > 0x07D0) && (OSYS < 0x07D6)) { Notify (FAPP, 0x80) // Status Change } } } Method (_Q25, 0, NotSerialized) // _Qxx: EC Query { If (IGDS) { If (APPE) { Notify (FAPP, 0x86) // Device-Specific } Else { ^^^GFX0.GHDS (One) Sleep (0x64) } } } Name (BCUR, Zero) Method (ALUX, 1, NotSerialized) { If (BCUR == Zero) { If (BLVL == Zero) { BLVL = 0x75FF } BCUR = BLVL /* \_SB_.PCI0.LPCB.BLVL */ } If (Arg0 == Zero) { BRTS = Zero Return (Zero) } If (Arg0 == 0x03) { BRTS = (BCUR >> 0x08) Return (BCUR) /* \_SB_.PCI0.LPCB.EC0_.BCUR */ } If ((Arg0 == One) && BRTS) { BCUR = (((BCUR << 0x10) + 0x8000) / 0xFADA) If (BCUR > 0x75FF) { BCUR = 0x75FF } BRTS = (BCUR >> 0x08) BLVL = BCUR /* \_SB_.PCI0.LPCB.EC0_.BCUR */ Return (BCUR) /* \_SB_.PCI0.LPCB.EC0_.BCUR */ } If ((Arg0 == 0x02) && BRTS) { BCUR = (((BCUR * 0xFAD9) + 0x7D6D) >> 0x10) If (BCUR < 0x0500) { BCUR = 0x0500 } BRTS = (BCUR >> 0x08) BLVL = BCUR /* \_SB_.PCI0.LPCB.EC0_.BCUR */ Return (BCUR) /* \_SB_.PCI0.LPCB.EC0_.BCUR */ } Return (0x00FFFFFF) } Method (_Q26, 0, NotSerialized) // _Qxx: EC Query { } Method (_Q27, 0, NotSerialized) // _Qxx: EC Query { Notify (BAT0, 0x81) // Information Change } Method (_Q28, 0, NotSerialized) // _Qxx: EC Query { If ((OSYS > 0x07D0) && (OSYS < 0x07D6)) { ALUX (One) If (APPE) { Notify (FAPP, 0x80) // Status Change } } ElseIf (BCLV < 0x64) { OSDE = One Notify (^^^GFX0.DD02, 0x86) // Device-Specific } ElseIf (APPE) { Notify (FAPP, 0x80) // Status Change } } Method (_Q29, 0, NotSerialized) // _Qxx: EC Query { If ((OSYS > 0x07D0) && (OSYS < 0x07D6)) { ALUX (0x02) If (APPE) { Notify (FAPP, 0x81) // Information Change } } ElseIf (BCLV > Zero) { OSDE = One Notify (^^^GFX0.DD02, 0x87) // Device-Specific } ElseIf (APPE) { Notify (FAPP, 0x81) // Information Change } } Method (_Q2A, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x85) // Device-Specific } } Method (_Q2B, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x83) // Device-Specific Change } } Method (_Q2C, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x84) // Reserved } } Method (_Q2D, 0, NotSerialized) // _Qxx: EC Query { Notify (FAPP, 0xA0) // Device-Specific } Method (_Q2F, 0, NotSerialized) // _Qxx: EC Query { Notify (SLPB, 0x80) // Status Change } Method (_Q34, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x87) // Device-Specific } } Method (_Q35, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x88) // Device-Specific } } Method (_Q36, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x98) // Device-Specific } } Method (_Q37, 0, NotSerialized) // _Qxx: EC Query { If (BLTP) { If (BLTH) { BLTH = Zero } Else { BLTH = One } } If (APPE) { Notify (FAPP, 0x89) // Device-Specific } } Method (_Q3A, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x91) // Device-Specific } } Method (_Q3B, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x8F) // Device-Specific } Notify (\_TZ.THZN, 0x80) // Thermal Status Change } Method (_Q3C, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x90) // Device-Specific } } Method (_Q40, 0, NotSerialized) // _Qxx: EC Query { If (G3GP) { If (QRHW == Zero) { G3GS = 0x88 } If (APPE) { Notify (FAPP, 0x96) // Device-Specific } } } Method (_Q41, 0, NotSerialized) // _Qxx: EC Query { If (G3GP) { If (QRHW == Zero) { G3GS = 0x99 } If (APPE) { Notify (FAPP, 0x97) // Device-Specific } } } Method (_Q42, 0, NotSerialized) // _Qxx: EC Query { G3GS = 0x88 If (APPE) { Notify (FAPP, 0x99) // Device-Specific } } Method (_Q46, 0, NotSerialized) // _Qxx: EC Query { If (APPE) { Notify (FAPP, 0x93) // Device-Specific } } } Scope (\_SB) { Device (AC0) { Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: Hardware ID Name (_PCL, Package (0x01) // _PCL: Power Consumer List { _SB }) Method (_PSR, 0, NotSerialized) // _PSR: Power Source { If (ECON) { Return (^^PCI0.LPCB.EC0.ACIN) /* \_SB_.PCI0.LPCB.EC0_.ACIN */ } Else { Return (One) } } } Device (LID0) { Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID Method (_LID, 0, NotSerialized) // _LID: Lid Status { If (ECON) { If (^^PCI0.LPCB.EC0.LIDC) { Return (One) } Else { Return (Zero) } } Else { Return (One) } } } Device (PWRB) { Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID } Device (SLPB) { Name (_HID, EisaId ("PNP0C0E") /* Sleep Button Device */) // _HID: Hardware ID } Device (FAPP) { Name (_HID, "TPSACPI01") // _HID: Hardware ID Name (TMP1, Zero) Name (TMP2, Zero) Name (TMP3, Zero) Method (FNCX, 1, NotSerialized) { If (Arg0 == 0x80) {} If (Arg0 == 0x81) { If (^^PCI0.LPCB.EC0.TOUC == One) { ^^PCI0.LPCB.EC0.TOUC = Zero } Else { ^^PCI0.LPCB.EC0.TOUC = One } } If (Arg0 == 0x82) { If (^^PCI0.LPCB.EC0.BLTH == One) { ^^PCI0.LPCB.EC0.BLTH = Zero } Else { ^^PCI0.LPCB.EC0.BLTH = One } } If (Arg0 == 0x83) { If (^^PCI0.LPCB.EC0.WIRE == One) { ^^PCI0.LPCB.EC0.WIRE = Zero } Else { ^^PCI0.LPCB.EC0.WIRE = One } } If (APPS (0x84, Arg0) == 0x84) { Local0 = (Arg0 >> 0x08) Local0 &= 0xFF If ((OSYS > 0x07D0) && (OSYS < 0x07D6)) { ^^PCI0.LPCB.EC0.BRTS = Local0 Local0 |= (Local0 << 0x08) ^^PCI0.LPCB.BLVL = Local0 ^^PCI0.LPCB.EC0.BCUR = ^^PCI0.LPCB.BLVL /* \_SB_.PCI0.LPCB.BLVL */ } Else { Local0 *= 0x05 Local2 = ^^PCI0.LPCB.EC0.BCLV /* \_SB_.PCI0.LPCB.EC0_.BCLV */ If (Local2 > Local0) { Local0 = (Local2 - Local0) Divide (Local0, 0x05, Local1, Local0) While (Local0) { ^^PCI0.LPCB.EC0.OSDE = Zero Notify (^^PCI0.GFX0.DD02, 0x87) // Device-Specific Local0-- } } If (Local0 > Local2) { Local0 -= Local2 Divide (Local0, 0x05, Local1, Local0) While (Local0) { ^^PCI0.LPCB.EC0.OSDE = Zero Notify (^^PCI0.GFX0.DD02, 0x86) // Device-Specific Local0-- } } } } If (APPS (0x85, Arg0) == 0x85) { Local0 = Arg0 Local0 >>= 0x08 Local0 &= 0xFF Local1 = Zero Local1 |= ^^PCI0.GFX0.CPDL Local1 += ^^PCI0.GFX0.CPL2 Local1 += ^^PCI0.GFX0.CPL3 If (Local1 == 0x0700) { Local1 = 0x0600 } If (Local1 == 0x0800) { Local1 = 0x0700 } If (Local0 == 0x07) { ^^PCI0.GFX0.NADL = 0x0100 ^^PCI0.GFX0.NDL2 = 0x0400 ^^PCI0.GFX0.NDL3 = 0x0300 } If (Local0 == 0x06) { ^^PCI0.GFX0.CADL = 0x0300 ^^PCI0.GFX0.CAL2 = Zero ^^PCI0.GFX0.CAL3 = Zero ^^PCI0.GFX0.NADL = 0x0300 ^^PCI0.GFX0.NDL2 = 0x0400 ^^PCI0.GFX0.NDL3 = Zero } If (Local0 == 0x05) { ^^PCI0.GFX0.CADL = 0x0100 ^^PCI0.GFX0.CAL2 = Zero ^^PCI0.GFX0.CAL3 = Zero ^^PCI0.GFX0.NADL = 0x0100 ^^PCI0.GFX0.NDL2 = 0x0400 ^^PCI0.GFX0.NDL3 = Zero } If (Local0 == 0x04) { If (Local1 == 0x0500) { ^^PCI0.GFX0.CADL = 0x0400 ^^PCI0.GFX0.CAL2 = 0x0100 ^^PCI0.GFX0.CAL3 = Zero } If (Local1 == 0x0700) { ^^PCI0.GFX0.CADL = 0x0400 ^^PCI0.GFX0.CAL2 = 0x0100 ^^PCI0.GFX0.CAL3 = Zero } If (Local1 == 0x0600) { ^^PCI0.GFX0.CADL = 0x0400 ^^PCI0.GFX0.CAL2 = 0x0300 ^^PCI0.GFX0.CAL3 = Zero } ^^PCI0.GFX0.NADL = 0x0400 ^^PCI0.GFX0.NDL2 = Zero ^^PCI0.GFX0.NDL3 = Zero } If (Local0 == 0x03) { ^^PCI0.GFX0.CADL = 0x0400 ^^PCI0.GFX0.CAL2 = Zero ^^PCI0.GFX0.CAL3 = Zero ^^PCI0.GFX0.NADL = 0x0100 ^^PCI0.GFX0.NDL2 = 0x0300 ^^PCI0.GFX0.NDL3 = Zero } If (Local0 == 0x02) { If (Local1 == 0x0600) { ^^PCI0.GFX0.CADL = 0x0400 ^^PCI0.GFX0.CAL2 = Zero ^^PCI0.GFX0.CAL3 = Zero } If (Local1 == 0x0700) { ^^PCI0.GFX0.CADL = 0x0100 ^^PCI0.GFX0.CAL2 = 0x0300 ^^PCI0.GFX0.CAL3 = Zero } ^^PCI0.GFX0.NADL = 0x0300 ^^PCI0.GFX0.NDL2 = Zero ^^PCI0.GFX0.NDL3 = Zero } If (Local0 == One) { If (Local1 == 0x0700) { ^^PCI0.GFX0.CADL = 0x0400 ^^PCI0.GFX0.CAL2 = 0x0300 ^^PCI0.GFX0.CAL3 = Zero } If (Local1 == 0x0500) { ^^PCI0.GFX0.CADL = 0x0400 ^^PCI0.GFX0.CAL2 = Zero ^^PCI0.GFX0.CAL3 = Zero } ^^PCI0.GFX0.NADL = 0x0100 ^^PCI0.GFX0.NDL2 = Zero ^^PCI0.GFX0.NDL3 = Zero } ^^PCI0.GFX0.GHDS (One) } If (Arg0 == 0x86) { ^^PCI0.LPCB.EC0.APPE = One } If (Arg0 == 0x87) { ^^PCI0.LPCB.EC0.APPE = Zero } If (Arg0 == 0x88) { ^^PCI0.LPCB.EC0.FANM = One } If (Arg0 == 0x89) { ^^PCI0.LPCB.EC0.FANM = 0x02 } If (Arg0 == 0x90) { ^^PCI0.LPCB.EC0.FANM = 0x03 } If (Arg0 == 0x91) { ^^PCI0.LPCB.EC0.EN_L = One ^^PCI0.LPCB.EC0.DI_L = Zero } If (Arg0 == 0x92) { ^^PCI0.LPCB.EC0.EN_L = Zero ^^PCI0.LPCB.EC0.DI_L = One } If (Arg0 == 0x97) { If (^^PCI0.LPCB.G3GP) { If (^^PCI0.LPCB.EC0.G3GS == 0x88) { ^^PCI0.LPCB.EC0.G3GS = 0x99 } Else { ^^PCI0.LPCB.EC0.G3GS = 0x88 } } } If (Arg0 == 0x99) { If (^^PCI0.LPCB.EC0.CAME) { ^^PCI0.LPCB.EC0.CAME = Zero } Else { ^^PCI0.LPCB.EC0.CAME = One } } } Method (GETX, 1, NotSerialized) { If (Arg0 == 0x84) { If ((OSYS > 0x07D0) && (OSYS < 0x07D6)) { TMP1 = Zero TMP1 = ^^PCI0.LPCB.EC0.BRTS /* \_SB_.PCI0.LPCB.EC0_.BRTS */ TMP1 &= 0xFF TMP1 |= 0x00750500 Return (TMP1) /* \_SB_.FAPP.TMP1 */ } Else { Local0 = ^^PCI0.LPCB.EC0.BCLV /* \_SB_.PCI0.LPCB.EC0_.BCLV */ Divide (Local0, 0x05, Local0, Local1) TMP1 = Local1 TMP1 |= 0x00140000 Return (TMP1) /* \_SB_.FAPP.TMP1 */ } } If (Arg0 == 0x80) { Return (0xFFFFFFFF) } If (Arg0 == 0x85) { Return (^^PCI0.LPCB.EC0.RTMP) /* \_SB_.PCI0.LPCB.EC0_.RTMP */ } If (Arg0 == 0x86) { Return (^^PCI0.LPCB.EC0.CFAN) /* \_SB_.PCI0.LPCB.EC0_.CFAN */ } If (Arg0 == 0x87) { TMP1 = Zero TMP2 = Zero TMP3 = Zero TMP1 |= ^^PCI0.GFX0.CPDL /* \_SB_.FAPP.TMP1 */ TMP1 |= ^^PCI0.GFX0.CPL2 /* \_SB_.FAPP.TMP1 */ TMP1 |= ^^PCI0.GFX0.CPL3 /* \_SB_.FAPP.TMP1 */ If ((TMP1 == 0x0700) | (TMP1 == 0x0300)) { TMP3 += ^^PCI0.GFX0.CPDL /* \_SB_.PCI0.GFX0.CPDL */ TMP3 += ^^PCI0.GFX0.CPL2 /* \_SB_.PCI0.GFX0.CPL2 */ TMP3 += ^^PCI0.GFX0.CPL3 /* \_SB_.PCI0.GFX0.CPL3 */ If (TMP3 == 0x0700) { TMP1 = 0x0600 } If (TMP3 == 0x0300) { TMP1 = 0x0200 } } TMP1 <<= 0x08 TMP2 = Zero TMP2 |= ^^PCI0.GFX0.CADL /* \_SB_.FAPP.TMP2 */ TMP2 |= ^^PCI0.GFX0.CAL2 /* \_SB_.FAPP.TMP2 */ TMP2 |= ^^PCI0.GFX0.CAL3 /* \_SB_.FAPP.TMP2 */ If ((TMP2 == 0x0700) | (TMP2 == 0x0300)) { TMP3 = Zero TMP3 += ^^PCI0.GFX0.CADL /* \_SB_.PCI0.GFX0.CADL */ TMP3 += ^^PCI0.GFX0.CAL2 /* \_SB_.PCI0.GFX0.CAL2 */ TMP3 += ^^PCI0.GFX0.CAL3 /* \_SB_.PCI0.GFX0.CAL3 */ If (TMP3 == 0x0700) { TMP2 = 0x0600 } If (TMP3 == 0x0300) { TMP2 = 0x0200 } } TMP2 >>= 0x08 TMP1 |= TMP2 /* \_SB_.FAPP.TMP2 */ Return (TMP1) /* \_SB_.FAPP.TMP1 */ } If (Arg0 == 0x81) { Return (^^PCI0.LPCB.EC0.TOUC) /* \_SB_.PCI0.LPCB.EC0_.TOUC */ } If (Arg0 == 0x82) { If (^^PCI0.LPCB.BLTP) { Return (^^PCI0.LPCB.EC0.BLTH) /* \_SB_.PCI0.LPCB.EC0_.BLTH */ } Else { Return (0xFFFFFFFF) } } If (Arg0 == 0x83) { If (^^PCI0.LPCB.WLDP) { If (^^PCI0.LPCB.EC0.HSWE && ^^PCI0.LPCB.EC0.HWSW) { If (^^PCI0.LPCB.EC0.HSWS) { Return ((0x00030000 + ^^PCI0.LPCB.EC0.WIRE)) } Else { Return ((0x00010000 + ^^PCI0.LPCB.EC0.WIRE)) } } Return (^^PCI0.LPCB.EC0.WIRE) /* \_SB_.PCI0.LPCB.EC0_.WIRE */ } Else { Return (0xFFFFFFFF) } } If (Arg0 == 0x96) { If (^^PCI0.LPCB.G3GP) { If (^^PCI0.LPCB.EC0.G3GS == 0x88) { If (^^PCI0.LPCB.EC0.HSWE && !^^PCI0.LPCB.EC0.HWSW) { If (^^PCI0.LPCB.EC0.HSWS) { Return (0x00030001) } Else { Return (0x00010001) } } Return (One) } Else { If (^^PCI0.LPCB.EC0.HSWE && !^^PCI0.LPCB.EC0.HWSW) { If (^^PCI0.LPCB.EC0.HSWS) { Return (0x00030000) } Else { Return (0x00010000) } } Return (Zero) } } Else { Return (0xFFFFFFFF) } } If (Arg0 == 0xA0) { TMP1 = Zero TMP1 = ^^PCI0.LPCB.EC0.CTLC /* \_SB_.PCI0.LPCB.EC0_.CTLC */ TMP1 <<= 0x08 TMP1 |= ^^PCI0.LPCB.EC0.CTLH /* \_SB_.FAPP.TMP1 */ TMP1 <<= 0x08 TMP1 |= ^^PCI0.LPCB.EC0.CTLL /* \_SB_.FAPP.TMP1 */ Return (TMP1) /* \_SB_.FAPP.TMP1 */ } If (Arg0 == 0x91) { Local0 = Zero If (^^PCI0.LPCB.EC0.BSTS & One) { Local0 |= One } If (^^PCI0.LPCB.EC0.LCON) { Local0 |= 0x02 } Local0 |= 0x0400 If (^^PCI0.LPCB.EC0.LEAR) { Local0 |= 0x00010000 } Return (Local0) } If (Arg0 == 0x99) { If (^^PCI0.LPCB.EC0.CAMS) { Return ((0x02 + ^^PCI0.LPCB.EC0.CAME)) } Else { Return (0xFFFFFFFF) } } Return (Zero) } Method (APPS, 2, NotSerialized) { Local0 = Arg1 Local0 &= 0xFF Return (Local0) } } } Device (DMAC) { Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0x0081, // Range Minimum 0x0081, // Range Maximum 0x01, // Alignment 0x11, // Length ) IO (Decode16, 0x0093, // Range Minimum 0x0093, // Range Maximum 0x01, // Alignment 0x0D, // Length ) IO (Decode16, 0x00C0, // Range Minimum 0x00C0, // Range Maximum 0x01, // Alignment 0x20, // Length ) DMA (Compatibility, NotBusMaster, Transfer8_16, ) {4} }) } Device (FWHD) { Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadOnly, 0xFF000000, // Address Base 0x01000000, // Address Length ) }) } Device (HPET) { Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID Name (BUF0, ResourceTemplate () { IRQNoFlags () {0} IRQNoFlags () {8} Memory32Fixed (ReadOnly, 0xFED00000, // Address Base 0x00000400, // Address Length _Y0F) }) Name (BUF1, ResourceTemplate () { }) Method (_STA, 0, NotSerialized) // _STA: Status { If (OSYS >= 0x07D1) { If (HPAE) { Return (0x0F) } } ElseIf (HPAE) { Return (0x0B) } Return (Zero) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { If (HPAE) { CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y0F._BAS, HPT0) // _BAS: Base Address If (HPAS == One) { HPT0 = 0xFED01000 } If (HPAS == 0x02) { HPT0 = 0xFED02000 } If (HPAS == 0x03) { HPT0 = 0xFED03000 } Return (BUF0) /* \_SB_.PCI0.LPCB.HPET.BUF0 */ } Else { Return (BUF1) /* \_SB_.PCI0.LPCB.HPET.BUF1 */ } } } Device (IPIC) { Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0020, // Range Minimum 0x0020, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0024, // Range Minimum 0x0024, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0028, // Range Minimum 0x0028, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x002C, // Range Minimum 0x002C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0030, // Range Minimum 0x0030, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0034, // Range Minimum 0x0034, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0038, // Range Minimum 0x0038, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x003C, // Range Minimum 0x003C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A0, // Range Minimum 0x00A0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A4, // Range Minimum 0x00A4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A8, // Range Minimum 0x00A8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00AC, // Range Minimum 0x00AC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B0, // Range Minimum 0x00B0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B4, // Range Minimum 0x00B4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B8, // Range Minimum 0x00B8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00BC, // Range Minimum 0x00BC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IRQNoFlags () {2} }) } Device (MATH) { Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x00F0, // Range Minimum 0x00F0, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {13} }) } Device (LDRC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x002E, // Range Minimum 0x002E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x004E, // Range Minimum 0x004E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0061, // Range Minimum 0x0061, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0063, // Range Minimum 0x0063, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0065, // Range Minimum 0x0065, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0067, // Range Minimum 0x0067, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0092, // Range Minimum 0x0092, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x00B2, // Range Minimum 0x00B2, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0680, // Range Minimum 0x0680, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0x0500, // Range Minimum 0x0500, // Range Maximum 0x01, // Alignment 0x10, // Length ) IO (Decode16, 0x0600, // Range Minimum 0x0600, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0xFFFF, // Range Minimum 0xFFFF, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0400, // Range Minimum 0x0400, // Range Maximum 0x01, // Alignment 0x80, // Length ) IO (Decode16, 0x1180, // Range Minimum 0x1180, // Range Maximum 0x01, // Alignment 0x80, // Length ) IO (Decode16, 0x164E, // Range Minimum 0x164E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0xFE00, // Range Minimum 0xFE00, // Range Maximum 0x01, // Alignment 0x01, // Length ) }) } Device (CDRC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, 0x03) // _UID: Unique ID Name (BUF0, ResourceTemplate () { IO (Decode16, 0x06B0, // Range Minimum 0x06B0, // Range Maximum 0x01, // Alignment 0x40, // Length ) }) Name (BUF1, ResourceTemplate () { IO (Decode16, 0x06B0, // Range Minimum 0x06B0, // Range Maximum 0x01, // Alignment 0x50, // Length ) }) Name (BUF2, ResourceTemplate () { IO (Decode16, 0x06A0, // Range Minimum 0x06A0, // Range Maximum 0x01, // Alignment 0x10, // Length ) IO (Decode16, 0x06B0, // Range Minimum 0x06B0, // Range Maximum 0x01, // Alignment 0x40, // Length ) }) Name (BUF3, ResourceTemplate () { IO (Decode16, 0x06A0, // Range Minimum 0x06A0, // Range Maximum 0x01, // Alignment 0x10, // Length ) IO (Decode16, 0x06B0, // Range Minimum 0x06B0, // Range Maximum 0x01, // Alignment 0x50, // Length ) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { If (EMAE) { If (SMSC && CIRP) { Return (BUF0) /* \_SB_.PCI0.LPCB.CDRC.BUF0 */ } Return (BUF1) /* \_SB_.PCI0.LPCB.CDRC.BUF1 */ } Else { If (SMSC && CIRP) { Return (BUF2) /* \_SB_.PCI0.LPCB.CDRC.BUF2 */ } Return (BUF3) /* \_SB_.PCI0.LPCB.CDRC.BUF3 */ } } } Device (RTC) { Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID Name (BUF0, ResourceTemplate () { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {8} }) Name (BUF1, ResourceTemplate () { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x01, // Alignment 0x08, // Length ) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { If (OSYS >= 0x07D1) { If (HPAE) { Return (BUF1) /* \_SB_.PCI0.LPCB.RTC_.BUF1 */ } Else { Return (BUF0) /* \_SB_.PCI0.LPCB.RTC_.BUF0 */ } } Else { Return (BUF0) /* \_SB_.PCI0.LPCB.RTC_.BUF0 */ } } } Device (TIMR) { Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID Name (BUF0, ResourceTemplate () { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x0050, // Range Minimum 0x0050, // Range Maximum 0x10, // Alignment 0x04, // Length ) IRQNoFlags () {0} }) Name (BUF1, ResourceTemplate () { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x0050, // Range Minimum 0x0050, // Range Maximum 0x10, // Alignment 0x04, // Length ) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { If (OSYS >= 0x07D1) { If (HPAE) { Return (BUF1) /* \_SB_.PCI0.LPCB.TIMR.BUF1 */ } Else { Return (BUF0) /* \_SB_.PCI0.LPCB.TIMR.BUF0 */ } } Else { Return (BUF0) /* \_SB_.PCI0.LPCB.TIMR.BUF0 */ } } } Device (PS2K) { Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0060, // Range Minimum 0x0060, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0064, // Range Minimum 0x0064, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQ (Edge, ActiveHigh, Exclusive, ) {1} }) Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { StartDependentFn (0x00, 0x00) { FixedIO ( 0x0060, // Address 0x01, // Length ) FixedIO ( 0x0064, // Address 0x01, // Length ) IRQNoFlags () {1} } EndDependentFn () }) } Device (PS2M) { Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IRQ (Edge, ActiveHigh, Exclusive, ) {12} }) Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { StartDependentFn (0x00, 0x00) { IRQNoFlags () {12} } EndDependentFn () }) } } Device (EHC1) { Name (_ADR, 0x001D0000) // _ADR: Address OperationRegion (U1CS, PCI_Config, 0x62, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { , 1, E1EN, 8 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { E1EN = Ones } Else { E1EN = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PRT1) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, Zero }) } Device (USB1) { Name (_ADR, 0x001D0001) // _ADR: Address OperationRegion (U1CS, PCI_Config, 0xC4, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { U1EN, 2 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { U1EN = 0x03 } Else { U1EN = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PRT1) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, Zero }) } Device (USB2) { Name (_ADR, 0x001D0002) // _ADR: Address OperationRegion (U1CS, PCI_Config, 0xC4, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { U1EN, 2 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { U1EN = 0x03 } Else { U1EN = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PRT1) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, Zero }) } Device (USB3) { Name (_ADR, 0x001D0003) // _ADR: Address OperationRegion (U1CS, PCI_Config, 0xC4, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { U1EN, 2 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { U1EN = 0x03 } Else { U1EN = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PRT1) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, Zero }) } Device (USB4) { Name (_ADR, 0x001D0004) // _ADR: Address OperationRegion (U1CS, PCI_Config, 0xC4, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { U1EN, 2 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { U1EN = 0x03 } Else { U1EN = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PRT1) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, Zero }) } Device (EHC2) { Name (_ADR, 0x001A0000) // _ADR: Address OperationRegion (U1CS, PCI_Config, 0x62, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { , 1, E2EN, 6 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { E2EN = Ones } Else { E2EN = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PRT1) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, Zero }) } Device (USB5) { Name (_ADR, 0x001A0001) // _ADR: Address OperationRegion (U1CS, PCI_Config, 0xC4, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { U1EN, 2 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { U1EN = 0x03 } Else { U1EN = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PRT1) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, Zero }) } Device (USB6) { Name (_ADR, 0x001A0002) // _ADR: Address OperationRegion (U1CS, PCI_Config, 0xC4, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { U1EN, 2 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { U1EN = 0x03 } Else { U1EN = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PRT1) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, Zero }) } Device (USB7) { Name (_ADR, 0x001A0003) // _ADR: Address OperationRegion (U1CS, PCI_Config, 0xC4, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { U1EN, 2 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { U1EN = 0x03 } Else { U1EN = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PRT1) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler If (Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8")) { _T_0 = ToInteger (Arg2) If (_T_0 == Zero) { _T_1 = ToInteger (Arg1) If (_T_1 == One) { Return (Buffer (One) { 0x07 /* . */ }) } Else { Return (Buffer (One) { 0x00 /* . */ }) } } ElseIf (_T_0 == One) { Return (One) } ElseIf (_T_0 == 0x02) { Return (SDGV) /* \SDGV */ } Else { Return (Zero) } } Else { Return (Zero) } } } } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, Zero }) } Device (HDEF) { Name (_ADR, 0x001B0000) // _ADR: Address OperationRegion (HDAR, PCI_Config, 0x4C, 0x10) Field (HDAR, WordAcc, NoLock, Preserve) { DCKA, 1, Offset (0x01), DCKM, 1, , 6, DCKS, 1, Offset (0x08), , 15, PMES, 1 } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, 0x04 }) } Device (RP01) { Name (_ADR, 0x001C0000) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR04 ()) } Return (PR04 ()) } } Device (RP02) { Name (_ADR, 0x001C0001) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR05 ()) } Return (PR05 ()) } } Device (RP03) { Name (_ADR, 0x001C0002) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } Name (PXSX._RMV, One) // _RMV: Removal Status Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, One, Zero }) Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR06 ()) } Return (PR06 ()) } } Device (RP04) { Name (_ADR, 0x001C0003) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR07 ()) } Return (PR07 ()) } } Device (RP05) { Name (_ADR, 0x001C0004) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR08 ()) } Return (PR08 ()) } } Device (RP06) { Name (_ADR, 0x001C0005) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR09) /* \_SB_.AR09 */ } Return (PR09) /* \_SB_.PR09 */ } } Device (RP07) { Name (_ADR, 0x001C0006) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR0E) /* \_SB_.AR0E */ } Return (PR0E) /* \_SB_.PR0E */ } } Device (RP08) { Name (_ADR, 0x001C0007) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR0F) /* \_SB_.AR0F */ } Return (PR0F) /* \_SB_.PR0F */ } } Device (IO10) { Name (_ADR, 0x00080000) // _ADR: Address OperationRegion (IBUS, PCI_Config, 0xD0, 0xE0) Field (IBUS, DWordAcc, NoLock, Preserve) { , 26, TOLM, 6, , 26, TOHM, 38, Offset (0xB0), VTEN, 1, , 11, VTBA, 20 } } Device (IO1X) { Name (_ADR, 0x00080001) // _ADR: Address OperationRegion (PBIC, PCI_Config, Zero, 0xF0) Field (PBIC, DWordAcc, NoLock, Preserve) { Offset (0x7C), SR0, 32, SR1, 32, SR2, 32, SR3, 32, SR4, 32, SR5, 32, SR6, 32, SR7, 32, SR8, 32, SR9, 32 } } Device (IIO0) { Name (_ADR, 0x00140000) // _ADR: Address OperationRegion (IBUS, PCI_Config, 0xD0, 0xE0) Field (IBUS, DWordAcc, NoLock, Preserve) { , 26, TOLM, 6, , 26, TOHM, 38, Offset (0xB0), VTEN, 1, , 11, VTBA, 20 } } Device (IIOX) { Name (_ADR, 0x00140001) // _ADR: Address OperationRegion (PBIC, PCI_Config, Zero, 0xF0) Field (PBIC, DWordAcc, NoLock, Preserve) { Offset (0x7C), SR0, 32, SR1, 32, SR2, 32, SR3, 32, SR4, 32, SR5, 32, SR6, 32, SR7, 32, SR8, 32, SR9, 32 } } Device (PEG3) { Name (_ADR, 0x00030000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR0A ()) } Return (PR0A ()) } } Device (PEG4) { Name (_ADR, 0x00040000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } Device (PEG5) { Name (_ADR, 0x00050000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR0C) /* \_SB_.AR0C */ } Return (PR0C) /* \_SB_.PR0C */ } } Device (PEG6) { Name (_ADR, 0x00060000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } } } Scope (_PR) { Processor (CPU0, 0x00, 0x00000410, 0x06) {} Processor (CPU1, 0x01, 0x00000410, 0x06) {} Processor (CPU2, 0x02, 0x00000410, 0x06) {} Processor (CPU3, 0x03, 0x00000410, 0x06) {} Processor (CPU4, 0x04, 0x00000410, 0x06) {} Processor (CPU5, 0x05, 0x00000410, 0x06) {} Processor (CPU6, 0x06, 0x00000410, 0x06) {} Processor (CPU7, 0x07, 0x00000410, 0x06) {} } Mutex (MUTX, 0x00) OperationRegion (PRT0, SystemIO, 0x80, 0x04) Field (PRT0, DWordAcc, Lock, Preserve) { P80H, 32 } Method (P8XH, 2, Serialized) { If (Arg0 == Zero) { P80D = ((P80D & 0xFFFFFF00) | Arg1) } If (Arg0 == One) { P80D = ((P80D & 0xFFFF00FF) | (Arg1 << 0x08)) } If (Arg0 == 0x02) { P80D = ((P80D & 0xFF00FFFF) | (Arg1 << 0x10)) } If (Arg0 == 0x03) { P80D = ((P80D & 0x00FFFFFF) | (Arg1 << 0x18)) } P80H = P80D /* \P80D */ } OperationRegion (SPRT, SystemIO, 0xB2, 0x02) Field (SPRT, ByteAcc, Lock, Preserve) { SSMP, 8 } Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model { GPIC = Arg0 PICM = Arg0 } Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep { P80D = Zero P8XH (Zero, Arg0) SLEP = Arg0 If (Arg0 == 0x04) { \_SB.PCI0.LPCB.APSP = \_SB.PCI0.LPCB.EC0.APPE } If (Arg0 == 0x03) { If (DTSE && (TCNT > One)) { TRAP (TRTD, 0x1E) } } If (DBGS == Zero) {} PM1S = 0xFFFF GPES = 0xFFFFFFFF GPEE &= 0x0100 \_SB.PCI0.RP01.PMSX = One \_SB.PCI0.RP02.PMSX = One \_SB.PCI0.RP03.PMSX = One \_SB.PCI0.RP04.PMSX = One \_SB.PCI0.RP05.PMSX = One \_SB.PCI0.RP07.PMSX = One \_SB.PCI0.RP08.PMSX = One } Method (_WAK, 1, Serialized) // _WAK: Wake { P8XH (One, 0xAB) If (NEXP) { If (OSCC & 0x02) { \_SB.PCI0.NHPG () } If (OSCC & 0x04) { \_SB.PCI0.NPME () } } If (\_SB.PCI0.LPCB.EC0.P3GP) { \_SB.PCI0.LPCB.G3GP = Zero } If (Arg0 == 0x04) { \_SB.PCI0.LPCB.EC0.APPE = \_SB.PCI0.LPCB.APSP } \_SB.PCI0.LPCB.APSP = Zero If ((Arg0 == 0x03) || (Arg0 == 0x04)) { If (DTSE && (TCNT > One)) { TRAP (TRTD, 0x14) } \_SB.PCI0.LPCB.EC0.RTMP = CRTT /* \CRTT */ If (OSYS == 0x07D2) { If (CFGD & One) { If (\_PR.CPU0._PPC > Zero) { \_PR.CPU0._PPC -= One PNOT () \_PR.CPU0._PPC += One PNOT () } Else { \_PR.CPU0._PPC += One PNOT () \_PR.CPU0._PPC -= One PNOT () } } } If (RP1D == Zero) { Notify (\_SB.PCI0.RP01, Zero) // Bus Check } If (RP2D == Zero) { Notify (\_SB.PCI0.RP02, Zero) // Bus Check } If (RP3D == Zero) { Notify (\_SB.PCI0.RP03, Zero) // Bus Check } If (RP4D == Zero) { Notify (\_SB.PCI0.RP04, Zero) // Bus Check } If (RP5D == Zero) { Notify (\_SB.PCI0.RP05, Zero) // Bus Check } If (RP7D == Zero) { If (DSTS == Zero) { Notify (\_SB.PCI0.RP07, Zero) // Bus Check } } If (RP8D == Zero) { If (DSTS == Zero) { Notify (\_SB.PCI0.RP08, Zero) // Bus Check } } } Return (Package (0x02) { Zero, Zero }) } Method (GETB, 3, Serialized) { Local0 = (Arg0 * 0x08) Local1 = (Arg1 * 0x08) CreateField (Arg2, Local0, Local1, TBF3) Return (TBF3) /* \GETB.TBF3 */ } Method (PNOT, 0, Serialized) { If (TCNT > One) { If (PDC0 & 0x08) { Notify (\_PR.CPU0, 0x80) // Performance Capability Change If (PDC0 & 0x10) { Sleep (0x64) Notify (\_PR.CPU0, 0x81) // C-State Change } } If (PDC1 & 0x08) { Notify (\_PR.CPU1, 0x80) // Performance Capability Change If (PDC1 & 0x10) { Sleep (0x64) Notify (\_PR.CPU1, 0x81) // C-State Change } } If (PDC2 & 0x08) { Notify (\_PR.CPU2, 0x80) // Performance Capability Change If (PDC2 & 0x10) { Sleep (0x64) Notify (\_PR.CPU2, 0x81) // C-State Change } } If (PDC3 & 0x08) { Notify (\_PR.CPU3, 0x80) // Performance Capability Change If (PDC3 & 0x10) { Sleep (0x64) Notify (\_PR.CPU3, 0x81) // C-State Change } } If (PDC4 & 0x08) { Notify (\_PR.CPU4, 0x80) // Performance Capability Change If (PDC4 & 0x10) { Sleep (0x64) Notify (\_PR.CPU4, 0x81) // C-State Change } } If (PDC5 & 0x08) { Notify (\_PR.CPU5, 0x80) // Performance Capability Change If (PDC5 & 0x10) { Sleep (0x64) Notify (\_PR.CPU5, 0x81) // C-State Change } } If (PDC6 & 0x08) { Notify (\_PR.CPU6, 0x80) // Performance Capability Change If (PDC6 & 0x10) { Sleep (0x64) Notify (\_PR.CPU6, 0x81) // C-State Change } } If (PDC7 & 0x08) { Notify (\_PR.CPU7, 0x80) // Performance Capability Change If (PDC7 & 0x10) { Sleep (0x64) Notify (\_PR.CPU7, 0x81) // C-State Change } } } Else { Notify (\_PR.CPU0, 0x80) // Performance Capability Change Sleep (0x64) Notify (\_PR.CPU0, 0x81) // C-State Change } } Method (TRAP, 2, Serialized) { SMIF = Arg1 If (Arg0 == TRTP) { TRP0 = Zero } If (Arg0 == TRTD) { DTSF = Arg1 TRPD = Zero Return (DTSF) /* \DTSF */ } If (Arg0 == TRTI) { TRPH = Zero } Return (SMIF) /* \SMIF */ } Scope (_SB.PCI0) { Method (_INI, 0, NotSerialized) // _INI: Initialize { OSYS = 0x07D0 If (CondRefOf (_OSI, Local0)) { If (_OSI ("Linux")) { OSYS = 0x03E8 } If (_OSI ("Windows 2001")) { OSYS = 0x07D1 } If (_OSI ("Windows 2001 SP1")) { OSYS = 0x07D1 } If (_OSI ("Windows 2001 SP2")) { OSYS = 0x07D2 } If (_OSI ("Windows 2006")) { OSYS = 0x07D6 } If (_OSI ("Windows 2009")) { OSYS = 0x07D9 } } } Method (NHPG, 0, Serialized) { ^RP01.HPEX = Zero ^RP02.HPEX = Zero ^RP03.HPEX = Zero ^RP04.HPEX = Zero ^RP01.HPSX = One ^RP02.HPSX = One ^RP03.HPSX = One ^RP04.HPSX = One } Method (NPME, 0, Serialized) { ^RP01.PMEX = Zero ^RP02.PMEX = Zero ^RP03.PMEX = Zero ^RP04.PMEX = Zero ^RP05.PMEX = Zero ^RP07.PMEX = Zero ^RP08.PMEX = Zero ^RP01.PMSX = One ^RP02.PMSX = One ^RP03.PMSX = One ^RP04.PMSX = One ^RP05.PMSX = One ^RP07.PMSX = One ^RP08.PMSX = One } } Scope (\) { Name (PICM, Zero) } Scope (_TZ) { Name (THRH, 0x0E58) Name (CTMP, 0x0E94) ThermalZone (THZN) { Method (_TMP, 0, Serialized) // _TMP: Temperature { If (ECON) { Local0 = (0x0AAC + (\_SB.PCI0.LPCB.EC0.RTMP * 0x0A)) } Else { Local0 = 0x0C80 } Return (Local0) } Method (_SCP, 1, NotSerialized) // _SCP: Set Cooling Policy { } Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature { Return ((0x0AAC + (PSVT * 0x0A))) } Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature { Return ((0x0AAC + (CRTT * 0x0A))) } Method (_PSL, 0, Serialized) // _PSL: Passive List { If (TCNT == 0x08) { Return (Package (0x08) { \_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3, \_PR.CPU4, \_PR.CPU5, \_PR.CPU6, \_PR.CPU7 }) } If (TCNT == 0x04) { Return (Package (0x04) { \_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3 }) } If (TCNT == 0x02) { Return (Package (0x02) { \_PR.CPU0, \_PR.CPU1 }) } Return (Package (0x01) { \_PR.CPU0 }) } Method (_TC1, 0, Serialized) // _TC1: Thermal Constant 1 { Return (TC1V) /* \TC1V */ } Method (_TC2, 0, Serialized) // _TC2: Thermal Constant 2 { Return (TC2V) /* \TC2V */ } Method (_TSP, 0, Serialized) // _TSP: Thermal Sampling Period { Return (0x28) } } } Scope (_SB.PCI0) { Device (PDRC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (BUF0, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00004000, // Address Length _Y10) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00004000, // Address Length _Y13) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y14) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y15) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y16) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y11) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y12) Memory32Fixed (ReadWrite, 0xFED20000, // Address Base 0x00020000, // Address Length ) Memory32Fixed (ReadOnly, 0xFED90000, // Address Base 0x00004000, // Address Length _Y17) Memory32Fixed (ReadWrite, 0xFED40000, // Address Base 0x00005000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED45000, // Address Base 0x0004B000, // Address Length ) Memory32Fixed (ReadOnly, 0xFF000000, // Address Base 0x01000000, // Address Length ) Memory32Fixed (ReadOnly, 0xFEE00000, // Address Base 0x00100000, // Address Length ) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y10._BAS, RBR0) // _BAS: Base Address RBR0 = (^^LPCB.RCBA << 0x0E) If (^^TMRP.TRID == 0x3B32) { CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y11._LEN, TMRL) // _LEN: Length TMRL = Zero CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y12._BAS, TMB0) // _BAS: Base Address TMB0 = (^^TMRP.TARB << 0x0C) } Else { TTDR = Zero CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y11._BAS, TMR1) // _BAS: Base Address TMR1 = (^^TMRP.TBAR << 0x0C) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y12._BAS, TMB1) // _BAS: Base Address TMB1 = (^^TMRP.TARB << 0x0C) TTDR = One } If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y13._LEN, MBLN) // _LEN: Length MBLN = Zero } Else { CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y13._BAS, MBR0) // _BAS: Base Address MBR0 = (MHBR << 0x0E) } CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y14._BAS, DBR0) // _BAS: Base Address DBR0 = (DIBR << 0x0C) If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { DBR0 = (DIBI << 0x0C) } If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y15._LEN, EBLN) // _LEN: Length EBLN = Zero } Else { CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y15._BAS, EBR0) // _BAS: Base Address EBR0 = (EPBR << 0x0C) } CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y16._BAS, XBR0) // _BAS: Base Address XBR0 = (^^^CPBG.IMCH.PXBR << 0x14) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y16._LEN, XSZ0) // _LEN: Length XSZ0 = (0x10000000 >> ^^^CPBG.IMCH.PXSZ) /* \_SB_.CPBG.IMCH.PXSZ */ CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y17._BAS, VTB0) // _BAS: Base Address CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y17._LEN, VTLN) // _LEN: Length If (((PNHM & 0x000FFFF0) == 0x000106E0) | ((PNHM & 0x000FFFF0 ) == 0x000106A0)) { If (PNHM >= 0x000106E1) { If (^^IO10.VTEN) { VTB0 = (^^IO10.VTBA << 0x0C) } Else { VTLN = Zero } } ElseIf (^^IIO0.VTEN) { VTB0 = (^^IIO0.VTBA << 0x0C) } Else { VTLN = Zero } } ElseIf (ADVE) { VTB0 = (ADVT << 0x0C) } Else { VTLN = Zero } Return (BUF0) /* \_SB_.PCI0.PDRC.BUF0 */ } } } Method (BRTN, 1, Serialized) { If ((DID1 & 0x0F00) == 0x0400) { Notify (\_SB.PCI0.GFX0.DD01, Arg0) } If ((DID2 & 0x0F00) == 0x0400) { Notify (\_SB.PCI0.GFX0.DD02, Arg0) } If ((DID3 & 0x0F00) == 0x0400) { Notify (\_SB.PCI0.GFX0.DD03, Arg0) } If ((DID4 & 0x0F00) == 0x0400) { Notify (\_SB.PCI0.GFX0.DD04, Arg0) } If ((DID5 & 0x0F00) == 0x0400) { Notify (\_SB.PCI0.GFX0.DD05, Arg0) } If ((DID6 & 0x0F00) == 0x0400) { Notify (\_SB.PCI0.GFX0.DD06, Arg0) } If ((DID7 & 0x0F00) == 0x0400) { Notify (\_SB.PCI0.GFX0.DD07, Arg0) } If ((DID8 & 0x0F00) == 0x0400) { Notify (\_SB.PCI0.GFX0.DD08, Arg0) } } Scope (\) { OperationRegion (IO_T, SystemIO, 0x0500, 0x10) Field (IO_T, ByteAcc, NoLock, Preserve) { TRPI, 16, Offset (0x04), Offset (0x06), Offset (0x08), TRP0, 8, Offset (0x0A), Offset (0x0B), Offset (0x0C), Offset (0x0D), Offset (0x0E), Offset (0x0F), Offset (0x10) } OperationRegion (IO_D, SystemIO, 0x0600, 0x04) Field (IO_D, ByteAcc, NoLock, Preserve) { TRPD, 8 } OperationRegion (IO_H, SystemIO, 0x0500, 0x04) Field (IO_H, ByteAcc, NoLock, Preserve) { TRPH, 8 } OperationRegion (PMIO, SystemIO, PMBS, 0x80) Field (PMIO, ByteAcc, NoLock, Preserve) { PM1S, 16, PM1E, 16, Offset (0x20), GPES, 32, GPEE, 32, Offset (0x42), , 1, GPEC, 1, Offset (0x64), , 9, SCIS, 1, Offset (0x66) } OperationRegion (GPIO, SystemIO, GPBS, 0x64) Field (GPIO, ByteAcc, NoLock, Preserve) { GU00, 8, GU01, 8, GU02, 8, GU03, 8, GIO0, 8, GIO1, 8, GIO2, 8, GIO3, 8, Offset (0x0C), GL00, 8, GL01, 8, GL02, 8, , 3, GP27, 1, GP28, 1, Offset (0x10), Offset (0x18), GB00, 8, GB01, 8, GB02, 8, GB03, 8, Offset (0x2C), GIV0, 8, GIV1, 8, GIV2, 8, GIV3, 8, GU04, 8, GU05, 8, GU06, 8, GU07, 8, GIO4, 8, GIO5, 8, GIO6, 8, GIO7, 8, , 5, , 1, Offset (0x39), GL05, 8, GL06, 8, GL07, 8, Offset (0x40), GU08, 8, GU09, 8, GU0A, 8, GU0B, 8, GIO8, 8, GIO9, 8, GIOA, 8, GIOB, 8, GL08, 8, GL09, 8, GL0A, 8, GL0B, 8 } OperationRegion (RCRB, SystemMemory, SRCB, 0x4000) Field (RCRB, DWordAcc, Lock, Preserve) { Offset (0x1000), Offset (0x3000), Offset (0x3404), HPAS, 2, , 5, HPAE, 1, Offset (0x3418), , 1, , 1, SATD, 1, SMBD, 1, HDAD, 1, Offset (0x341A), RP1D, 1, RP2D, 1, RP3D, 1, RP4D, 1, RP5D, 1, RP6D, 1, RP7D, 1, RP8D, 1, TTDR, 1 } OperationRegion (PTBA, SystemMemory, TBAB, 0x1000) Field (PTBA, AnyAcc, NoLock, Preserve) { Offset (0x12), PCTA, 16, Offset (0x1A), PTRC, 16, Offset (0x30), CTV1, 16, CTV2, 16, Offset (0x60), PMCP, 16 } OperationRegion (OEMS, SystemMemory, 0xFFE41000, 0x1000) Field (OEMS, AnyAcc, NoLock, Preserve) { Offset (0xC0), STR1, 512, Offset (0x200), STR2, 512 } Method (GETP, 1, Serialized) { If ((Arg0 & 0x09) == Zero) { Return (0xFFFFFFFF) } If ((Arg0 & 0x09) == 0x08) { Return (0x0384) } Local0 = ((Arg0 & 0x0300) >> 0x08) Local1 = ((Arg0 & 0x3000) >> 0x0C) Return ((0x1E * (0x09 - (Local0 + Local1)))) } Method (GDMA, 5, Serialized) { If (Arg0) { If (Arg1 && Arg4) { Return (0x14) } If (Arg2 && Arg4) { Return (((0x04 - Arg3) * 0x0F)) } Return (((0x04 - Arg3) * 0x1E)) } Return (0xFFFFFFFF) } Method (GETT, 1, Serialized) { Return ((0x1E * (0x09 - (((Arg0 >> 0x02) & 0x03 ) + (Arg0 & 0x03))))) } Method (GETF, 3, Serialized) { Name (TMPF, Zero) If (Arg0) { TMPF |= One } If (Arg2 & 0x02) { TMPF |= 0x02 } If (Arg1) { TMPF |= 0x04 } If (Arg2 & 0x20) { TMPF |= 0x08 } If (Arg2 & 0x4000) { TMPF |= 0x10 } Return (TMPF) /* \GETF.TMPF */ } Method (SETP, 3, Serialized) { If (Arg0 > 0xF0) { Return (0x08) } Else { If (Arg1 & 0x02) { If ((Arg0 <= 0x78) && (Arg2 & 0x02)) { Return (0x2301) } If ((Arg0 <= 0xB4) && (Arg2 & One)) { Return (0x2101) } } Return (0x1001) } } Method (SDMA, 1, Serialized) { If (Arg0 <= 0x14) { Return (One) } If (Arg0 <= 0x1E) { Return (0x02) } If (Arg0 <= 0x2D) { Return (One) } If (Arg0 <= 0x3C) { Return (0x02) } If (Arg0 <= 0x5A) { Return (One) } Return (Zero) } Method (SETT, 3, Serialized) { If (Arg1 & 0x02) { If ((Arg0 <= 0x78) && (Arg2 & 0x02)) { Return (0x0B) } If ((Arg0 <= 0xB4) && (Arg2 & One)) { Return (0x09) } } Return (0x04) } } Scope (_SB.PCI0) { Device (SAT0) { Name (_ADR, 0x001F0002) // _ADR: Address OperationRegion (SACS, PCI_Config, 0x40, 0xC0) Field (SACS, DWordAcc, NoLock, Preserve) { PRIT, 16, SECT, 16, PSIT, 4, SSIT, 4, Offset (0x08), SYNC, 4, Offset (0x0A), SDT0, 2, , 2, SDT1, 2, Offset (0x0B), SDT2, 2, , 2, SDT3, 2, Offset (0x14), ICR0, 4, ICR1, 4, ICR2, 4, ICR3, 4, ICR4, 4, ICR5, 4, Offset (0x50), MAPV, 2 } } Device (SAT1) { Name (_ADR, 0x001F0005) // _ADR: Address OperationRegion (SACS, PCI_Config, 0x40, 0xC0) Field (SACS, DWordAcc, NoLock, Preserve) { PRIT, 16, SECT, 16, PSIT, 4, SSIT, 4, Offset (0x08), SYNC, 4, Offset (0x0A), SDT0, 2, , 2, SDT1, 2, Offset (0x0B), SDT2, 2, , 2, SDT3, 2, Offset (0x14), ICR0, 4, ICR1, 4, ICR2, 4, ICR3, 4, ICR4, 4, ICR5, 4, Offset (0x50), MAPV, 2 } } Device (SBUS) { Name (_ADR, 0x001F0003) // _ADR: Address OperationRegion (SMBP, PCI_Config, 0x40, 0xC0) Field (SMBP, DWordAcc, NoLock, Preserve) { , 2, I2CE, 1 } OperationRegion (SMPB, PCI_Config, 0x20, 0x04) Field (SMPB, DWordAcc, NoLock, Preserve) { , 5, SBAR, 11 } OperationRegion (SMBI, SystemIO, (SBAR << 0x05), 0x10) Field (SMBI, ByteAcc, NoLock, Preserve) { HSTS, 8, Offset (0x02), HCON, 8, HCOM, 8, TXSA, 8, DAT0, 8, DAT1, 8, HBDR, 8, PECR, 8, RXSA, 8, SDAT, 16 } Method (SSXB, 2, Serialized) { If (STRT ()) { Return (Zero) } I2CE = Zero HSTS = 0xBF TXSA = Arg0 HCOM = Arg1 HCON = 0x48 If (COMP ()) { HSTS |= 0xFF Return (One) } Return (Zero) } Method (SRXB, 1, Serialized) { If (STRT ()) { Return (0xFFFF) } I2CE = Zero HSTS = 0xBF TXSA = (Arg0 | One) HCON = 0x44 If (COMP ()) { HSTS |= 0xFF Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */ } Return (0xFFFF) } Method (SWRB, 3, Serialized) { If (STRT ()) { Return (Zero) } I2CE = Zero HSTS = 0xBF TXSA = Arg0 HCOM = Arg1 DAT0 = Arg2 HCON = 0x48 If (COMP ()) { HSTS |= 0xFF Return (One) } Return (Zero) } Method (SRDB, 2, Serialized) { If (STRT ()) { Return (0xFFFF) } I2CE = Zero HSTS = 0xBF TXSA = (Arg0 | One) HCOM = Arg1 HCON = 0x48 If (COMP ()) { HSTS |= 0xFF Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */ } Return (0xFFFF) } Method (SWRW, 3, Serialized) { If (STRT ()) { Return (Zero) } I2CE = Zero HSTS = 0xBF TXSA = Arg0 HCOM = Arg1 DAT1 = (Arg2 & 0xFF) DAT0 = ((Arg2 >> 0x08) & 0xFF) HCON = 0x4C If (COMP ()) { HSTS |= 0xFF Return (One) } Return (Zero) } Method (SRDW, 2, Serialized) { If (STRT ()) { Return (0xFFFF) } I2CE = Zero HSTS = 0xBF TXSA = (Arg0 | One) HCOM = Arg1 HCON = 0x4C If (COMP ()) { HSTS |= 0xFF Return (((DAT0 << 0x08) | DAT1)) } Return (0xFFFFFFFF) } Method (SBLW, 4, Serialized) { If (STRT ()) { Return (Zero) } I2CE = Arg3 HSTS = 0xBF TXSA = Arg0 HCOM = Arg1 DAT0 = SizeOf (Arg2) Local1 = Zero HBDR = DerefOf (Arg2 [Zero]) HCON = 0x54 While (SizeOf (Arg2) > Local1) { Local0 = 0x0FA0 While (!(HSTS & 0x80) && Local0) { Local0-- Stall (0x32) } If (!Local0) { KILL () Return (Zero) } HSTS = 0x80 Local1++ If (SizeOf (Arg2) > Local1) { HBDR = DerefOf (Arg2 [Local1]) } } If (COMP ()) { HSTS |= 0xFF Return (One) } Return (Zero) } Method (SBLR, 3, Serialized) { Name (TBUF, Buffer (0x0100) {}) If (STRT ()) { Return (Zero) } I2CE = Arg2 HSTS = 0xBF TXSA = (Arg0 | One) HCOM = Arg1 HCON = 0x54 Local0 = 0x0FA0 While (!(HSTS & 0x80) && Local0) { Local0-- Stall (0x32) } If (!Local0) { KILL () Return (Zero) } TBUF [Zero] = DAT0 /* \_SB_.PCI0.SBUS.DAT0 */ HSTS = 0x80 Local1 = One While (Local1 < DerefOf (TBUF [Zero])) { Local0 = 0x0FA0 While (!(HSTS & 0x80) && Local0) { Local0-- Stall (0x32) } If (!Local0) { KILL () Return (Zero) } TBUF [Local1] = HBDR /* \_SB_.PCI0.SBUS.HBDR */ HSTS = 0x80 Local1++ } If (COMP ()) { HSTS |= 0xFF Return (TBUF) /* \_SB_.PCI0.SBUS.SBLR.TBUF */ } Return (Zero) } Method (STRT, 0, Serialized) { Local0 = 0xC8 While (Local0) { If (HSTS & 0x40) { Local0-- Sleep (One) If (Local0 == Zero) { Return (One) } } Else { Local0 = Zero } } Local0 = 0x0FA0 While (Local0) { If (HSTS & One) { Local0-- Stall (0x32) If (Local0 == Zero) { KILL () } } Else { Return (Zero) } } Return (One) } Method (COMP, 0, Serialized) { Local0 = 0x0FA0 While (Local0) { If (HSTS & 0x02) { Return (One) } Else { Local0-- Stall (0x32) If (Local0 == Zero) { KILL () } } } Return (Zero) } Method (KILL, 0, Serialized) { HCON |= 0x02 HSTS |= 0xFF } } Device (TMRP) { Name (_ADR, 0x001F0006) // _ADR: Address OperationRegion (TRCS, PCI_Config, Zero, 0x50) Field (TRCS, DWordAcc, NoLock, Preserve) { Offset (0x02), TRID, 16, Offset (0x10), SPTP, 1, , 11, TBAR, 20, Offset (0x40), SPEN, 1, , 11, TARB, 20 } } } Scope (_GPE) { Method (_L01, 0, NotSerialized) // _Lxx: Level-Triggered GPE { L01C += One P8XH (Zero, One) P8XH (One, L01C) If ((RP1D == Zero) && \_SB.PCI0.RP01.HPSX) { Sleep (0x64) If (\_SB.PCI0.RP01.PDCX) { \_SB.PCI0.RP01.PDCX = One \_SB.PCI0.RP01.HPSX = One Notify (\_SB.PCI0.RP01, Zero) // Bus Check } Else { \_SB.PCI0.RP01.HPSX = One } } If ((RP2D == Zero) && \_SB.PCI0.RP02.HPSX) { Sleep (0x64) If (\_SB.PCI0.RP02.PDCX) { \_SB.PCI0.RP02.PDCX = One \_SB.PCI0.RP02.HPSX = One Notify (\_SB.PCI0.RP02, Zero) // Bus Check } Else { \_SB.PCI0.RP02.HPSX = One } } If ((RP3D == Zero) && \_SB.PCI0.RP03.HPSX) { Sleep (0x64) If (\_SB.PCI0.RP03.PDCX) { \_SB.PCI0.RP03.PDCX = One \_SB.PCI0.RP03.HPSX = One Notify (\_SB.PCI0.RP03, Zero) // Bus Check } Else { \_SB.PCI0.RP03.HPSX = One } } If ((RP4D == Zero) && \_SB.PCI0.RP04.HPSX) { Sleep (0x64) If (\_SB.PCI0.RP04.PDCX) { \_SB.PCI0.RP04.PDCX = One \_SB.PCI0.RP04.HPSX = One Notify (\_SB.PCI0.RP04, Zero) // Bus Check } Else { \_SB.PCI0.RP04.HPSX = One } } If ((RP5D == Zero) && \_SB.PCI0.RP05.HPSX) { Sleep (0x64) If (\_SB.PCI0.RP05.PDCX) { \_SB.PCI0.RP05.PDCX = One \_SB.PCI0.RP05.HPSX = One Notify (\_SB.PCI0.RP05, Zero) // Bus Check } Else { \_SB.PCI0.RP05.HPSX = One } } If ((RP6D == Zero) && \_SB.PCI0.RP06.HPSX) { Sleep (0x64) If (\_SB.PCI0.RP06.PDCX) { \_SB.PCI0.RP06.PDCX = One \_SB.PCI0.RP06.HPSX = One Notify (\_SB.PCI0.RP06, Zero) // Bus Check } Else { \_SB.PCI0.RP06.HPSX = One } } If ((RP7D == Zero) && \_SB.PCI0.RP07.HPSX) { Sleep (0x64) If (\_SB.PCI0.RP07.PDCX) { \_SB.PCI0.RP07.PDCX = One \_SB.PCI0.RP07.HPSX = One Notify (\_SB.PCI0.RP07, Zero) // Bus Check } Else { \_SB.PCI0.RP07.HPSX = One } } If ((RP8D == Zero) && \_SB.PCI0.RP08.HPSX) { Sleep (0x64) If (\_SB.PCI0.RP08.PDCX) { \_SB.PCI0.RP08.PDCX = One \_SB.PCI0.RP08.HPSX = One Notify (\_SB.PCI0.RP08, Zero) // Bus Check } Else { \_SB.PCI0.RP08.HPSX = One } } } Method (_L06, 0, NotSerialized) // _Lxx: Level-Triggered GPE { If (\_SB.PCI0.GFX0.GSSE && !GSMI) { \_SB.PCI0.GFX0.GSCI () } } Method (_L07, 0, NotSerialized) // _Lxx: Level-Triggered GPE { \_SB.PCI0.SBUS.HSTS = 0x20 } Method (_L08, 0, NotSerialized) // _Lxx: Level-Triggered GPE { } Method (_L15, 0, NotSerialized) // _Lxx: Level-Triggered GPE { P8XH (Zero, 0xA1) } Method (_L1D, 0, NotSerialized) // _Lxx: Level-Triggered GPE { P8XH (Zero, 0xA2) } Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.RP01, 0x02) // Device Wake Notify (\_SB.PCI0.RP02, 0x02) // Device Wake Notify (\_SB.PCI0.RP03, 0x02) // Device Wake Notify (\_SB.PCI0.RP04, 0x02) // Device Wake Notify (\_SB.PCI0.RP05, 0x02) // Device Wake Notify (\_SB.PCI0.RP07, 0x02) // Device Wake Notify (\_SB.PCI0.RP08, 0x02) // Device Wake Notify (\_SB.PCI0.PEG3, 0x02) // Device Wake Notify (\_SB.PCI0.PEG4, 0x02) // Device Wake Notify (\_SB.PCI0.PEG5, 0x02) // Device Wake Notify (\_SB.PCI0.PEG6, 0x02) // Device Wake } Method (_L0B, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.P0P1, 0x02) // Device Wake } Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.EHC1, 0x02) // Device Wake Notify (\_SB.PCI0.EHC2, 0x02) // Device Wake Notify (\_SB.PCI0.HDEF, 0x02) // Device Wake } Method (_L03, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.USB1, 0x02) // Device Wake } Method (_L04, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.USB2, 0x02) // Device Wake } Method (_L0C, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.USB3, 0x02) // Device Wake } Method (_L0E, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.USB4, 0x02) // Device Wake } Method (_L05, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.USB5, 0x02) // Device Wake } Method (_L20, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.USB6, 0x02) // Device Wake } Method (_L25, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.USB7, 0x02) // Device Wake } } Scope (_SB) { Device (CPBG) { Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID Name (_UID, 0xFF) // _UID: Unique ID Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (((PELN >> 0x14) - One)) } Name (_ADR, Zero) // _ADR: Address Name (BUF0, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x00FF, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0001, // Length ,, _Y18) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { CreateWordField (BUF0, \_SB.CPBG._Y18._MIN, PBMN) // _MIN: Minimum Base Address PBMN = ((PELN >> 0x14) - One) CreateWordField (BUF0, \_SB.CPBG._Y18._MAX, PBMX) // _MAX: Maximum Base Address PBMX = ((PELN >> 0x14) - One) Return (BUF0) /* \_SB_.CPBG.BUF0 */ } Device (IMCH) { Name (_ADR, One) // _ADR: Address OperationRegion (PBUS, PCI_Config, Zero, 0xC0) Field (PBUS, DWordAcc, NoLock, Preserve) { Offset (0x40), , 4, PM0H, 2, Offset (0x41), PM1L, 2, , 2, PM1H, 2, Offset (0x42), PM2L, 2, , 2, PM2H, 2, Offset (0x43), PM3L, 2, , 2, PM3H, 2, Offset (0x44), PM4L, 2, , 2, PM4H, 2, Offset (0x45), PM5L, 2, , 2, PM5H, 2, Offset (0x46), PM6L, 2, , 2, PM6H, 2, Offset (0x47), Offset (0x48), , 7, HENA, 1, Offset (0x50), PXEN, 1, PXSZ, 2, , 17, PXBR, 12 } } } } Name (_S0, Package (0x04) // _S0_: S0 System State { Zero, Zero, Zero, Zero }) Name (_S3, Package (0x04) // _S3_: S3 System State { 0x05, Zero, Zero, Zero }) Name (_S4, Package (0x04) // _S4_: S4 System State { 0x06, Zero, Zero, Zero }) Name (_S5, Package (0x04) // _S5_: S5 System State { 0x07, Zero, Zero, Zero }) } FACP ---- [000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] [004h 0004 4] Table Length : 000000F4 [008h 0008 1] Revision : 03 [009h 0009 1] Checksum : A3 [00Ah 0010 6] Oem ID : "INTEL " [010h 0016 8] Oem Table ID : "CALPELLA" [018h 0024 4] Oem Revision : 06040000 [01Ch 0028 4] Asl Compiler ID : "PTEC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 4] FACS Address : BB79BFC0 [028h 0040 4] DSDT Address : BB7E5000 [02Ch 0044 1] Model : 00 [02Dh 0045 1] PM Profile : 02 [Mobile] [02Eh 0046 2] SCI Interrupt : 0009 [030h 0048 4] SMI Command Port : 000000B2 [034h 0052 1] ACPI Enable Value : F0 [035h 0053 1] ACPI Disable Value : F1 [036h 0054 1] S4BIOS Command : 00 [037h 0055 1] P-State Control : 80 [038h 0056 4] PM1A Event Block Address : 00000400 [03Ch 0060 4] PM1B Event Block Address : 00000000 [040h 0064 4] PM1A Control Block Address : 00000404 [044h 0068 4] PM1B Control Block Address : 00000000 [048h 0072 4] PM2 Control Block Address : 00000450 [04Ch 0076 4] PM Timer Block Address : 00000408 [050h 0080 4] GPE0 Block Address : 00000420 [054h 0084 4] GPE1 Block Address : 00000000 [058h 0088 1] PM1 Event Block Length : 04 [059h 0089 1] PM1 Control Block Length : 02 [05Ah 0090 1] PM2 Control Block Length : 01 [05Bh 0091 1] PM Timer Block Length : 04 [05Ch 0092 1] GPE0 Block Length : 10 [05Dh 0093 1] GPE1 Block Length : 00 [05Eh 0094 1] GPE1 Base Offset : 00 [05Fh 0095 1] _CST Support : 85 [060h 0096 2] C2 Latency : 0065 [062h 0098 2] C3 Latency : 0039 [064h 0100 2] CPU Cache Size : 0000 [066h 0102 2] Cache Flush Stride : 0000 [068h 0104 1] Duty Cycle Offset : 01 [069h 0105 1] Duty Cycle Width : 03 [06Ah 0106 1] RTC Day Alarm Index : 0D [06Bh 0107 1] RTC Month Alarm Index : 00 [06Ch 0108 1] RTC Century Index : 32 [06Dh 0109 2] Boot Flags (decoded below) : 0000 Legacy Devices Supported (V2) : 0 8042 Present on ports 60/64 (V2) : 0 VGA Not Present (V4) : 0 MSI Not Supported (V4) : 0 PCIe ASPM Not Supported (V4) : 0 CMOS RTC Not Present (V5) : 0 [06Fh 0111 1] Reserved : 00 [070h 0112 4] Flags (decoded below) : 000082A5 WBINVD instruction is operational (V1) : 1 WBINVD flushes all caches (V1) : 0 All CPUs support C1 (V1) : 1 C2 works on MP system (V1) : 0 Control Method Power Button (V1) : 0 Control Method Sleep Button (V1) : 1 RTC wake not in fixed reg space (V1) : 0 RTC can wake system from S4 (V1) : 1 32-bit PM Timer (V1) : 0 Docking Supported (V1) : 1 Reset Register Supported (V2) : 0 Sealed Case (V3) : 0 Headless - No Video (V3) : 0 Use native instr after SLP_TYPx (V3) : 0 PCIEXP_WAK Bits Supported (V4) : 0 Use Platform Timer (V4) : 1 RTC_STS valid on S4 wake (V4) : 0 Remote Power-on capable (V4) : 0 Use APIC Cluster Model (V4) : 0 Use APIC Physical Destination Mode (V4) : 0 Hardware Reduced (V5) : 0 Low Power S0 Idle (V5) : 0 [074h 0116 12] Reset Register : [Generic Address Structure] [074h 0116 1] Space ID : 00 [SystemMemory] [075h 0117 1] Bit Width : 00 [076h 0118 1] Bit Offset : 00 [077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy] [078h 0120 8] Address : 0000000000000000 [080h 0128 1] Value to cause reset : 00 [081h 0129 2] ARM Flags (decoded below) : 0000 PSCI Compliant : 0 Must use HVC for PSCI : 0 [083h 0131 1] FADT Minor Revision : 00 [084h 0132 8] FACS Address : 00000000BB79BFC0 [08Ch 0140 8] DSDT Address : 00000000BB7E5000 [094h 0148 12] PM1A Event Block : [Generic Address Structure] [094h 0148 1] Space ID : 01 [SystemIO] [095h 0149 1] Bit Width : 20 [096h 0150 1] Bit Offset : 00 [097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy] [098h 0152 8] Address : 0000000000000400 [0A0h 0160 12] PM1B Event Block : [Generic Address Structure] [0A0h 0160 1] Space ID : 00 [SystemMemory] [0A1h 0161 1] Bit Width : 00 [0A2h 0162 1] Bit Offset : 00 [0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy] [0A4h 0164 8] Address : 0000000000000000 [0ACh 0172 12] PM1A Control Block : [Generic Address Structure] [0ACh 0172 1] Space ID : 01 [SystemIO] [0ADh 0173 1] Bit Width : 10 [0AEh 0174 1] Bit Offset : 00 [0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy] [0B0h 0176 8] Address : 0000000000000404 [0B8h 0184 12] PM1B Control Block : [Generic Address Structure] [0B8h 0184 1] Space ID : 00 [SystemMemory] [0B9h 0185 1] Bit Width : 00 [0BAh 0186 1] Bit Offset : 00 [0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy] [0BCh 0188 8] Address : 0000000000000000 [0C4h 0196 12] PM2 Control Block : [Generic Address Structure] [0C4h 0196 1] Space ID : 01 [SystemIO] [0C5h 0197 1] Bit Width : 08 [0C6h 0198 1] Bit Offset : 00 [0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy] [0C8h 0200 8] Address : 0000000000000450 [0D0h 0208 12] PM Timer Block : [Generic Address Structure] [0D0h 0208 1] Space ID : 01 [SystemIO] [0D1h 0209 1] Bit Width : 20 [0D2h 0210 1] Bit Offset : 00 [0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy] [0D4h 0212 8] Address : 0000000000000408 [0DCh 0220 12] GPE0 Block : [Generic Address Structure] [0DCh 0220 1] Space ID : 01 [SystemIO] [0DDh 0221 1] Bit Width : 80 [0DEh 0222 1] Bit Offset : 00 [0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy] [0E0h 0224 8] Address : 0000000000000420 [0E8h 0232 12] GPE1 Block : [Generic Address Structure] [0E8h 0232 1] Space ID : 00 [SystemMemory] [0E9h 0233 1] Bit Width : 00 [0EAh 0234 1] Bit Offset : 00 [0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy] [0ECh 0236 8] Address : 0000000000000000 Raw Table Data: Length 244 (0xF4) 0000: 46 41 43 50 F4 00 00 00 03 A3 49 4E 54 45 4C 20 // FACP......INTEL 0010: 43 41 4C 50 45 4C 4C 41 00 00 04 06 50 54 45 43 // CALPELLA....PTEC 0020: 01 00 00 00 C0 BF 79 BB 00 50 7E BB 00 02 09 00 // ......y..P~..... 0030: B2 00 00 00 F0 F1 00 80 00 04 00 00 00 00 00 00 // ................ 0040: 04 04 00 00 00 00 00 00 50 04 00 00 08 04 00 00 // ........P....... 0050: 20 04 00 00 00 00 00 00 04 02 01 04 10 00 00 85 // ............... 0060: 65 00 39 00 00 00 00 00 01 03 0D 00 32 00 00 00 // e.9.........2... 0070: A5 82 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0080: 00 00 00 00 C0 BF 79 BB 00 00 00 00 00 50 7E BB // ......y......P~. 0090: 00 00 00 00 01 20 00 00 00 04 00 00 00 00 00 00 // ..... .......... 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 01 10 00 00 // ................ 00B0: 04 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00C0: 00 00 00 00 01 08 00 00 50 04 00 00 00 00 00 00 // ........P....... 00D0: 01 20 00 00 08 04 00 00 00 00 00 00 01 80 00 00 // . .............. 00E0: 20 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ............... 00F0: 00 00 00 00 // .... FACS ---- [000h 0000 4] Signature : "FACS" [004h 0004 4] Length : 00000040 [008h 0008 4] Hardware Signature : 00000000 [00Ch 0012 4] 32 Firmware Waking Vector : 00000000 [010h 0016 4] Global Lock : 00000000 [014h 0020 4] Flags (decoded below) : 00000000 S4BIOS Support Present : 0 64-bit Wake Supported (V2) : 0 [018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 [020h 0032 1] Version : 01 [021h 0033 3] Reserved : 000000 [024h 0036 4] OspmFlags (decoded below) : 00000000 64-bit Wake Env Required (V2) : 0 Raw Table Data: Length 64 (0x40) 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ HPET ---- [000h 0000 4] Signature : "HPET" [High Precision Event Timer table] [004h 0004 4] Table Length : 00000038 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : 89 [00Ah 0010 6] Oem ID : "INTEL " [010h 0016 8] Oem Table ID : "CALPELLA" [018h 0024 4] Oem Revision : 06040000 [01Ch 0028 4] Asl Compiler ID : "PTEC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 4] Hardware Block ID : 8086A701 [028h 0040 12] Timer Block Register : [Generic Address Structure] [028h 0040 1] Space ID : 00 [SystemMemory] [029h 0041 1] Bit Width : 00 [02Ah 0042 1] Bit Offset : 00 [02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] [02Ch 0044 8] Address : 00000000FED00000 [034h 0052 1] Sequence Number : 00 [035h 0053 2] Minimum Clock Ticks : 0080 [037h 0055 1] Flags (decoded below) : 00 4K Page Protect : 0 64K Page Protect : 0 Raw Table Data: Length 56 (0x38) 0000: 48 50 45 54 38 00 00 00 01 89 49 4E 54 45 4C 20 // HPET8.....INTEL 0010: 43 41 4C 50 45 4C 4C 41 00 00 04 06 50 54 45 43 // CALPELLA....PTEC 0020: 01 00 00 00 01 A7 86 80 00 00 00 00 00 00 D0 FE // ................ 0030: 00 00 00 00 00 80 00 00 // ........ MCFG ---- [000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] [004h 0004 4] Table Length : 0000003C [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : B6 [00Ah 0010 6] Oem ID : "INTEL " [010h 0016 8] Oem Table ID : "CALPELLA" [018h 0024 4] Oem Revision : 06040000 [01Ch 0028 4] Asl Compiler ID : "PTEC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 8] Reserved : 0000000000000000 [02Ch 0044 8] Base Address : 00000000E0000000 [034h 0052 2] Segment Group Number : 0000 [036h 0054 1] Start Bus Number : 00 [037h 0055 1] End Bus Number : FF [038h 0056 4] Reserved : 00000000 Raw Table Data: Length 60 (0x3C) 0000: 4D 43 46 47 3C 00 00 00 01 B6 49 4E 54 45 4C 20 // MCFG<.....INTEL 0010: 43 41 4C 50 45 4C 4C 41 00 00 04 06 50 54 45 43 // CALPELLA....PTEC 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E0 // ................ 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ SPCR ---- [000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table] [004h 0004 4] Table Length : 00000050 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : A0 [00Ah 0010 6] Oem ID : "PTLTD " [010h 0016 8] Oem Table ID : "$UCRTBL$" [018h 0024 4] Oem Revision : 06040000 [01Ch 0028 4] Asl Compiler ID : "PTL " [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 1] Interface Type : 00 [025h 0037 3] Reserved : 000000 [028h 0040 12] Serial Port Register : [Generic Address Structure] [028h 0040 1] Space ID : 00 [SystemMemory] [029h 0041 1] Bit Width : 00 [02Ah 0042 1] Bit Offset : 00 [02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] [02Ch 0044 8] Address : 0000000000000000 [034h 0052 1] Interrupt Type : 00 [035h 0053 1] PCAT-compatible IRQ : 00 [036h 0054 4] Interrupt : 00000000 [03Ah 0058 1] Baud Rate : 00 [03Bh 0059 1] Parity : 00 [03Ch 0060 1] Stop Bits : 00 [03Dh 0061 1] Flow Control : 00 [03Eh 0062 1] Terminal Type : 00 [04Ch 0076 1] Reserved : 00 [040h 0064 2] PCI Device ID : 0000 [042h 0066 2] PCI Vendor ID : 0000 [044h 0068 1] PCI Bus : 00 [045h 0069 1] PCI Device : 00 [046h 0070 1] PCI Function : 00 [047h 0071 4] PCI Flags : 00000000 [04Bh 0075 1] PCI Segment : 00 [04Ch 0076 4] Reserved : 00000000 Raw Table Data: Length 80 (0x50) 0000: 53 50 43 52 50 00 00 00 01 A0 50 54 4C 54 44 20 // SPCRP.....PTLTD 0010: 24 55 43 52 54 42 4C 24 00 00 04 06 50 54 4C 20 // $UCRTBL$....PTL 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ SSDT1 ----- DefinitionBlock ("", "SSDT", 1, "PmRef", "CpuPm", 0x00003000) { External (_PR_.CPU0, DeviceObj) External (_PR_.CPU1, DeviceObj) External (_PR_.CPU2, DeviceObj) External (_PR_.CPU3, DeviceObj) External (_PR_.CPU4, DeviceObj) External (_PR_.CPU5, DeviceObj) External (_PR_.CPU6, DeviceObj) External (_PR_.CPU7, DeviceObj) Scope (\) { Name (SSDT, Package (0x0C) { "CPU0IST ", 0xBB71A918, 0x000003F0, "APIST ", 0xBB719A98, 0x00000303, "CPU0CST ", 0xBB718018, 0x00000891, "APCST ", 0xBB717D98, 0x00000119 }) Name (CFGD, 0x012B0651) Name (\PDC0, 0x80000000) Name (\PDC1, 0x80000000) Name (\PDC2, 0x80000000) Name (\PDC3, 0x80000000) Name (\PDC4, 0x80000000) Name (\PDC5, 0x80000000) Name (\PDC6, 0x80000000) Name (\PDC7, 0x80000000) Name (\SDTL, Zero) } Scope (\_PR.CPU0) { Name (HI0, Zero) Name (HC0, Zero) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (CPDC, 1, NotSerialized) { CreateDWordField (Arg0, Zero, REVS) CreateDWordField (Arg0, 0x04, SIZE) Local0 = SizeOf (Arg0) Local1 = (Local0 - 0x08) CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP) Name (STS0, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 /* .... */ }) Concatenate (STS0, TEMP, Local2) Return (COSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)) } Method (COSC, 4, NotSerialized) { CreateDWordField (Arg3, Zero, STS0) CreateDWordField (Arg3, 0x04, CAP0) CreateDWordField (Arg0, Zero, IID0) CreateDWordField (Arg0, 0x04, IID1) CreateDWordField (Arg0, 0x08, IID2) CreateDWordField (Arg0, 0x0C, IID3) Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953")) CreateDWordField (UID0, Zero, EID0) CreateDWordField (UID0, 0x04, EID1) CreateDWordField (UID0, 0x08, EID2) CreateDWordField (UID0, 0x0C, EID3) If (!(((IID0 == EID0) && (IID1 == EID1)) && (( IID2 == EID2) && (IID3 == EID3)))) { STS0 = 0x06 Return (Arg3) } If (Arg1 != One) { STS0 = 0x0A Return (Arg3) } Return (Arg3) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS0) CreateDWordField (Arg0, 0x04, CAP0) If ((STS0 == 0x06) || (STS0 == 0x0A)) { Return (Zero) } If (STS0 & One) { CAP0 &= 0x0BFF Return (Zero) } PDC0 = ((PDC0 & 0x7FFFFFFF) | CAP0) /* \_PR_.CPU0.GCAP.CAP0 */ If (CFGD & One) { If (((CFGD & 0x01000000) && ((PDC0 & 0x09) == 0x09)) && !(SDTL & One)) { SDTL |= One OperationRegion (IST0, SystemMemory, DerefOf (SSDT [One]), DerefOf (SSDT [0x02])) Load (IST0, HI0) /* \_PR_.CPU0.HI0_ */ } } If (CFGD & 0xF0) { If (((CFGD & 0x01000000) && (PDC0 & 0x18)) && ! (SDTL & 0x02)) { SDTL |= 0x02 OperationRegion (CST0, SystemMemory, DerefOf (SSDT [0x07]), DerefOf (SSDT [0x08])) Load (CST0, HC0) /* \_PR_.CPU0.HC0_ */ } } Return (Zero) } } Scope (\_PR.CPU1) { Name (HI1, Zero) Name (HC1, Zero) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS1) CreateDWordField (Arg0, 0x04, CAP1) If ((STS1 == 0x06) || (STS1 == 0x0A)) { Return (Zero) } If (STS1 & One) { CAP1 &= 0x0BFF Return (Zero) } PDC1 = ((PDC1 & 0x7FFFFFFF) | CAP1) /* \_PR_.CPU1.GCAP.CAP1 */ If ((PDC0 & 0x09) == 0x09) { APPT () } If (PDC0 & 0x18) { APCT () } Return (Zero) } Method (APCT, 0, NotSerialized) { If ((CFGD & 0xF0) && !(SDTL & 0x20)) { SDTL |= 0x20 OperationRegion (CST1, SystemMemory, DerefOf (SSDT [0x0A]), DerefOf (SSDT [0x0B])) Load (CST1, HC1) /* \_PR_.CPU1.HC1_ */ } } Method (APPT, 0, NotSerialized) { If ((CFGD & One) && !(SDTL & 0x10)) { SDTL |= 0x10 OperationRegion (IST1, SystemMemory, DerefOf (SSDT [0x04]), DerefOf (SSDT [0x05])) Load (IST1, HI1) /* \_PR_.CPU1.HI1_ */ } } } Scope (\_PR.CPU2) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS2) CreateDWordField (Arg0, 0x04, CAP2) If ((STS2 == 0x06) || (STS2 == 0x0A)) { Return (Zero) } If (STS2 & One) { CAP2 &= 0x0BFF Return (Zero) } PDC2 = ((PDC2 & 0x7FFFFFFF) | CAP2) /* \_PR_.CPU2.GCAP.CAP2 */ If ((PDC2 & 0x09) == 0x09) { \_PR.CPU1.APPT () } If (PDC2 & 0x18) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU3) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS3) CreateDWordField (Arg0, 0x04, CAP3) If ((STS3 == 0x06) || (STS3 == 0x0A)) { Return (Zero) } If (STS3 & One) { CAP3 &= 0x0BFF Return (Zero) } PDC3 = ((PDC3 & 0x7FFFFFFF) | CAP3) /* \_PR_.CPU3.GCAP.CAP3 */ If ((PDC3 & 0x09) == 0x09) { \_PR.CPU1.APPT () } If (PDC3 & 0x18) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU4) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS4) CreateDWordField (Arg0, 0x04, CAP4) If ((STS4 == 0x06) || (STS4 == 0x0A)) { Return (Zero) } If (STS4 & One) { CAP4 &= 0x0BFF Return (Zero) } PDC4 = ((PDC4 & 0x7FFFFFFF) | CAP4) /* \_PR_.CPU4.GCAP.CAP4 */ If ((PDC4 & 0x09) == 0x09) { \_PR.CPU1.APPT () } If (PDC4 & 0x18) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU5) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS5) CreateDWordField (Arg0, 0x04, CAP5) If ((STS5 == 0x06) || (STS5 == 0x0A)) { Return (Zero) } If (STS5 & One) { CAP5 &= 0x0BFF Return (Zero) } PDC5 = ((PDC5 & 0x7FFFFFFF) | CAP5) /* \_PR_.CPU5.GCAP.CAP5 */ If ((PDC5 & 0x09) == 0x09) { \_PR.CPU1.APPT () } If (PDC5 & 0x18) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU6) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS6) CreateDWordField (Arg0, 0x04, CAP6) If ((STS6 == 0x06) || (STS6 == 0x0A)) { Return (Zero) } If (STS6 & One) { CAP6 &= 0x0BFF Return (Zero) } PDC6 = ((PDC6 & 0x7FFFFFFF) | CAP6) /* \_PR_.CPU6.GCAP.CAP6 */ If ((PDC6 & 0x09) == 0x09) { \_PR.CPU1.APPT () } If (PDC6 & 0x18) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU7) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS7) CreateDWordField (Arg0, 0x04, CAP7) If ((STS7 == 0x06) || (STS7 == 0x0A)) { Return (Zero) } If (STS7 & One) { CAP7 &= 0x0BFF Return (Zero) } PDC7 = ((PDC7 & 0x7FFFFFFF) | CAP7) /* \_PR_.CPU7.GCAP.CAP7 */ If ((PDC7 & 0x09) == 0x09) { \_PR.CPU1.APPT () } If (PDC7 & 0x18) { \_PR.CPU1.APCT () } Return (Zero) } } } SSDT2 ----- DefinitionBlock ("", "SSDT", 1, "PmRef", "ApIst", 0x00003000) { External (_PR_.CPU0._PCT, IntObj) External (_PR_.CPU0._PPC, IntObj) External (_PR_.CPU0._PSD, IntObj) External (_PR_.CPU0._PSS, IntObj) External (_PR_.CPU1, DeviceObj) External (_PR_.CPU2, DeviceObj) External (_PR_.CPU3, DeviceObj) External (_PR_.CPU4, DeviceObj) External (_PR_.CPU5, DeviceObj) External (_PR_.CPU6, DeviceObj) External (_PR_.CPU7, DeviceObj) Scope (\_PR.CPU1) { Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (\_PR.CPU0._PPC) /* External reference */ } Method (_PCT, 0, NotSerialized) // _PCT: Performance Control { Return (\_PR.CPU0._PCT) /* External reference */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { Return (\_PR.CPU0._PSS) /* External reference */ } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { Return (\_PR.CPU0._PSD) /* External reference */ } } Scope (\_PR.CPU2) { Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (\_PR.CPU0._PPC) /* External reference */ } Method (_PCT, 0, NotSerialized) // _PCT: Performance Control { Return (\_PR.CPU0._PCT) /* External reference */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { Return (\_PR.CPU0._PSS) /* External reference */ } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { Return (\_PR.CPU0._PSD) /* External reference */ } } Scope (\_PR.CPU3) { Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (\_PR.CPU0._PPC) /* External reference */ } Method (_PCT, 0, NotSerialized) // _PCT: Performance Control { Return (\_PR.CPU0._PCT) /* External reference */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { Return (\_PR.CPU0._PSS) /* External reference */ } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { Return (\_PR.CPU0._PSD) /* External reference */ } } Scope (\_PR.CPU4) { Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (\_PR.CPU0._PPC) /* External reference */ } Method (_PCT, 0, NotSerialized) // _PCT: Performance Control { Return (\_PR.CPU0._PCT) /* External reference */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { Return (\_PR.CPU0._PSS) /* External reference */ } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { Return (\_PR.CPU0._PSD) /* External reference */ } } Scope (\_PR.CPU5) { Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (\_PR.CPU0._PPC) /* External reference */ } Method (_PCT, 0, NotSerialized) // _PCT: Performance Control { Return (\_PR.CPU0._PCT) /* External reference */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { Return (\_PR.CPU0._PSS) /* External reference */ } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { Return (\_PR.CPU0._PSD) /* External reference */ } } Scope (\_PR.CPU6) { Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (\_PR.CPU0._PPC) /* External reference */ } Method (_PCT, 0, NotSerialized) // _PCT: Performance Control { Return (\_PR.CPU0._PCT) /* External reference */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { Return (\_PR.CPU0._PSS) /* External reference */ } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { Return (\_PR.CPU0._PSD) /* External reference */ } } Scope (\_PR.CPU7) { Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (\_PR.CPU0._PPC) /* External reference */ } Method (_PCT, 0, NotSerialized) // _PCT: Performance Control { Return (\_PR.CPU0._PCT) /* External reference */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { Return (\_PR.CPU0._PSS) /* External reference */ } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { Return (\_PR.CPU0._PSD) /* External reference */ } } } SSDT3 ----- DefinitionBlock ("", "SSDT", 1, "PmRef", "Cpu0Ist", 0x00003000) { External (_PR_.CPU0, DeviceObj) External (CFGD, UnknownObj) External (NPSS, IntObj) External (PDC0, UnknownObj) Scope (\_PR.CPU0) { Name (_PPC, Zero) // _PPC: Performance Present Capabilities Method (_PCT, 0, NotSerialized) // _PCT: Performance Control { If ((CFGD & One) && (PDC0 & One)) { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Return (Package (0x02) { ResourceTemplate () { Register (SystemIO, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000500, // Address ,) }, ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x00000000000000B3, // Address ,) } }) } Method (XPSS, 0, NotSerialized) { If (PDC0 & One) { Return (NPSS) /* External reference */ } Return (SPSS) /* \_PR_.CPU0.SPSS */ } Name (SPSS, Package (0x0B) { Package (0x06) { 0x000008DA, 0x000061A8, 0x0000006E, 0x0000000A, 0x00000083, 0x00000000 }, Package (0x06) { 0x00000855, 0x00005ACA, 0x0000006E, 0x0000000A, 0x00000183, 0x00000001 }, Package (0x06) { 0x000007CF, 0x00005426, 0x0000006E, 0x0000000A, 0x00000283, 0x00000002 }, Package (0x06) { 0x0000074A, 0x00004DA3, 0x0000006E, 0x0000000A, 0x00000383, 0x00000003 }, Package (0x06) { 0x000006C5, 0x0000472D, 0x0000006E, 0x0000000A, 0x00000483, 0x00000004 }, Package (0x06) { 0x0000063F, 0x000040EC, 0x0000006E, 0x0000000A, 0x00000583, 0x00000005 }, Package (0x06) { 0x000005BA, 0x00003AE3, 0x0000006E, 0x0000000A, 0x00000683, 0x00000006 }, Package (0x06) { 0x00000535, 0x000034E2, 0x0000006E, 0x0000000A, 0x00000783, 0x00000007 }, Package (0x06) { 0x000004AF, 0x00002F0F, 0x0000006E, 0x0000000A, 0x00000883, 0x00000008 }, Package (0x06) { 0x0000042A, 0x0000294F, 0x0000006E, 0x0000000A, 0x00000983, 0x00000009 }, Package (0x06) { 0x000003A5, 0x000023AE, 0x0000006E, 0x0000000A, 0x00000A83, 0x0000000A } }) Name (_PSS, Package (0x0B) // _PSS: Performance Supported States { Package (0x06) { 0x000008DA, 0x000061A8, 0x0000000A, 0x0000000A, 0x00000011, 0x00000011 }, Package (0x06) { 0x00000855, 0x00005ACA, 0x0000000A, 0x0000000A, 0x00000010, 0x00000010 }, Package (0x06) { 0x000007CF, 0x00005426, 0x0000000A, 0x0000000A, 0x0000000F, 0x0000000F }, Package (0x06) { 0x0000074A, 0x00004DA3, 0x0000000A, 0x0000000A, 0x0000000E, 0x0000000E }, Package (0x06) { 0x000006C5, 0x0000472D, 0x0000000A, 0x0000000A, 0x0000000D, 0x0000000D }, Package (0x06) { 0x0000063F, 0x000040EC, 0x0000000A, 0x0000000A, 0x0000000C, 0x0000000C }, Package (0x06) { 0x000005BA, 0x00003AE3, 0x0000000A, 0x0000000A, 0x0000000B, 0x0000000B }, Package (0x06) { 0x00000535, 0x000034E2, 0x0000000A, 0x0000000A, 0x0000000A, 0x0000000A }, Package (0x06) { 0x000004AF, 0x00002F0F, 0x0000000A, 0x0000000A, 0x00000009, 0x00000009 }, Package (0x06) { 0x0000042A, 0x0000294F, 0x0000000A, 0x0000000A, 0x00000008, 0x00000008 }, Package (0x06) { 0x000003A5, 0x000023AE, 0x0000000A, 0x0000000A, 0x00000007, 0x00000007 } }) Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If (PDC0 & 0x0800) { Return (HPSD) /* \_PR_.CPU0.HPSD */ } Return (SPSD) /* \_PR_.CPU0.SPSD */ } Name (HPSD, Package (0x01) { Package (0x05) { 0x05, Zero, Zero, 0xFE, 0x04 } }) Name (SPSD, Package (0x01) { Package (0x05) { 0x05, Zero, Zero, 0xFC, 0x04 } }) } } SSDT4 ----- DefinitionBlock ("", "SSDT", 1, "PmRef", "ApCst", 0x00003000) { External (_PR_.CPU0._CST, IntObj) External (_PR_.CPU1, DeviceObj) External (_PR_.CPU2, DeviceObj) External (_PR_.CPU3, DeviceObj) External (_PR_.CPU4, DeviceObj) External (_PR_.CPU5, DeviceObj) External (_PR_.CPU6, DeviceObj) External (_PR_.CPU7, DeviceObj) Scope (\_PR.CPU1) { Method (_CST, 0, NotSerialized) // _CST: C-States { Return (\_PR.CPU0._CST) /* External reference */ } } Scope (\_PR.CPU2) { Method (_CST, 0, NotSerialized) // _CST: C-States { Return (\_PR.CPU0._CST) /* External reference */ } } Scope (\_PR.CPU3) { Method (_CST, 0, NotSerialized) // _CST: C-States { Return (\_PR.CPU0._CST) /* External reference */ } } Scope (\_PR.CPU4) { Method (_CST, 0, NotSerialized) // _CST: C-States { Return (\_PR.CPU0._CST) /* External reference */ } } Scope (\_PR.CPU5) { Method (_CST, 0, NotSerialized) // _CST: C-States { Return (\_PR.CPU0._CST) /* External reference */ } } Scope (\_PR.CPU6) { Method (_CST, 0, NotSerialized) // _CST: C-States { Return (\_PR.CPU0._CST) /* External reference */ } } Scope (\_PR.CPU7) { Method (_CST, 0, NotSerialized) // _CST: C-States { Return (\_PR.CPU0._CST) /* External reference */ } } } SSDT5 ----- DefinitionBlock ("", "SSDT", 1, "PmRef", "Cpu0Cst", 0x00003001) { External (_PR_.CPU0, DeviceObj) External (CFGD, UnknownObj) External (PDC0, UnknownObj) External (PWRS, UnknownObj) Scope (\_PR.CPU0) { Method (_CST, 0, NotSerialized) // _CST: C-States { If ((CFGD & 0x00200000) && (PDC0 & 0x0200)) { If (!PWRS) { If (CFGD & 0x20000000) { If (CFGD & 0x40) { Return (Package (0x04) { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x03, // Access Size ) }, 0x02, 0xCD, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000030, // Address 0x03, // Access Size ) }, 0x03, 0xF5, 0xC8 } }) } Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000030, // Address 0x03, // Access Size ) }, 0x03, 0xF5, 0xC8 } }) } If (CFGD & 0x0200) { If (CFGD & 0x40) { Return (Package (0x04) { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x03, // Access Size ) }, 0x02, 0xCD, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x03, // Access Size ) }, 0x03, 0xF5, 0x015E } }) } Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x03, // Access Size ) }, 0x03, 0xF5, 0x015E } }) } If (CFGD & 0x40) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x03, // Access Size ) }, 0x02, 0xCD, 0x01F4 } }) } Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 } }) } If (CFGD & 0x0200) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x03, // Access Size ) }, 0x03, 0xF5, 0x015E } }) } If (CFGD & 0x40) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x03, // Access Size ) }, 0x02, 0xCD, 0x01F4 } }) } Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 } }) } If ((CFGD & 0x00200000) && (PDC0 & 0x0100)) { If (!PWRS) { If (CFGD & 0x20000000) { If (CFGD & 0x40) { Return (Package (0x04) { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0xCD, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000416, // Address ,) }, 0x03, 0xF5, 0xC8 } }) } Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000416, // Address ,) }, 0x03, 0xF5, 0xC8 } }) } If (CFGD & 0x0200) { If (CFGD & 0x40) { Return (Package (0x04) { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0xCD, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000415, // Address ,) }, 0x03, 0xF5, 0x015E } }) } Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000415, // Address ,) }, 0x02, 0xF5, 0x015E } }) } If (CFGD & 0x40) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0xCD, 0x01F4 } }) } Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 } }) } If (CFGD & 0x0200) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000415, // Address ,) }, 0x02, 0xF5, 0x015E } }) } If (CFGD & 0x40) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0xCD, 0x01F4 } }) } Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03, 0x03E8 } }) } If (!PWRS) { If (CFGD & 0x20000000) { If (CFGD & 0x40) { Return (Package (0x04) { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0xCD, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000416, // Address ,) }, 0x03, 0xF5, 0xC8 } }) } Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000416, // Address ,) }, 0x03, 0xF5, 0xC8 } }) } If (CFGD & 0x0200) { If (CFGD & 0x40) { Return (Package (0x04) { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0xCD, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000415, // Address ,) }, 0x03, 0xF5, 0x015E } }) } Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000415, // Address ,) }, 0x02, 0xF5, 0x015E } }) } If (CFGD & 0x40) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0xCD, 0x01F4 } }) } Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x03, 0x03E8 } }) } If (CFGD & 0x0200) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000415, // Address ,) }, 0x02, 0xF5, 0x015E } }) } If (CFGD & 0x40) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x03, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0xCD, 0x01F4 } }) } Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x03, 0x03E8 } }) } } }