Intel ACPI Component Architecture ACPI Binary Table Extraction Utility version 20230628 Copyright (c) 2000 - 2023 Intel Corporation Signature Length Version Oem Oem Oem Compiler Compiler Id TableId RevisionId Name Revision _________ __________ ____ ________ __________ __________ _______ __________ 01) SSDT 0x00001F68 0x02 "COREv4" "COREBOOT" 0x00000000 "CORE" 0x20230628 02) MCFG 0x0000003C 0x01 "COREv4" "COREBOOT" 0x00000000 "CORE" 0x20230628 03) APIC 0x00000072 0x03 "COREv4" "COREBOOT" 0x00000000 "CORE" 0x20230628 04) TPM2 0x0000004C 0x04 "COREv4" "COREBOOT" 0x00000000 "CORE" 0x20230628 05) DSDT 0x00005248 0x02 "COREv4" "COREBOOT" 0x20220930 "INTL" 0x20230628 06) LPIT 0x00000094 0x00 "COREv4" "COREBOOT" 0x00000000 "CORE" 0x20230628 07) DBG2 0x00000061 0x00 "COREv4" "COREBOOT" 0x00000000 "CORE" 0x20230628 08) DMAR 0x00000088 0x01 "COREv4" "COREBOOT" 0x00000000 "CORE" 0x20230628 09) FACP 0x00000114 0x06 "COREv4" "COREBOOT" 0x00000000 "CORE" 0x20230628 10) HPET 0x00000038 0x01 "COREv4" "COREBOOT" 0x00000000 "CORE" 0x20230628 11) FACS 0x00000040 0x01 12) BGRT 0x00000038 0x01 "INTEL " "EDK2 " 0x00000002 " " 0x01000013 Found 12 ACPI tables in acpidump APIC ---- [000h 0000 004h] Signature : "APIC" [Multiple APIC Description Table (MADT)] [004h 0004 004h] Table Length : 00000072 [008h 0008 001h] Revision : 03 [009h 0009 001h] Checksum : 82 [00Ah 0010 006h] Oem ID : "COREv4" [010h 0016 008h] Oem Table ID : "COREBOOT" [018h 0024 004h] Oem Revision : 00000000 [01Ch 0028 004h] Asl Compiler ID : "CORE" [020h 0032 004h] Asl Compiler Revision : 20230628 [024h 0036 004h] Local Apic Address : FEE00000 [028h 0040 004h] Flags (decoded below) : C239FEFD PC-AT Compatibility : 1 [02Ch 0044 001h] Subtable Type : 01 [I/O APIC] [02Dh 0045 001h] Length : 0C [02Eh 0046 001h] I/O Apic ID : 00 [02Fh 0047 001h] Reserved : 00 [030h 0048 004h] Address : FEC00000 [034h 0052 004h] Interrupt : 00000000 [038h 0056 001h] Subtable Type : 02 [Interrupt Source Override] [039h 0057 001h] Length : 0A [03Ah 0058 001h] Bus : 00 [03Bh 0059 001h] Source : 00 [03Ch 0060 004h] Interrupt : 00000002 [040h 0064 002h] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [042h 0066 001h] Subtable Type : 02 [Interrupt Source Override] [043h 0067 001h] Length : 0A [044h 0068 001h] Bus : 00 [045h 0069 001h] Source : 09 [046h 0070 004h] Interrupt : 00000009 [04Ah 0074 002h] Flags (decoded below) : 000D Polarity : 1 Trigger Mode : 3 [04Ch 0076 001h] Subtable Type : 00 [Processor Local APIC] [04Dh 0077 001h] Length : 08 [04Eh 0078 001h] Processor ID : 00 [04Fh 0079 001h] Local Apic ID : 00 [050h 0080 004h] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [054h 0084 001h] Subtable Type : 00 [Processor Local APIC] [055h 0085 001h] Length : 08 [056h 0086 001h] Processor ID : 01 [057h 0087 001h] Local Apic ID : 02 [058h 0088 004h] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [05Ch 0092 001h] Subtable Type : 00 [Processor Local APIC] [05Dh 0093 001h] Length : 08 [05Eh 0094 001h] Processor ID : 02 [05Fh 0095 001h] Local Apic ID : 04 [060h 0096 004h] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [064h 0100 001h] Subtable Type : 00 [Processor Local APIC] [065h 0101 001h] Length : 08 [066h 0102 001h] Processor ID : 03 [067h 0103 001h] Local Apic ID : 06 [068h 0104 004h] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [06Ch 0108 001h] Subtable Type : 04 [Local APIC NMI] [06Dh 0109 001h] Length : 06 [06Eh 0110 001h] Processor ID : FF [06Fh 0111 002h] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [071h 0113 001h] Interrupt Input LINT : 01 Raw Table Data: Length 114 (0x72) 0000: 41 50 49 43 72 00 00 00 03 82 43 4F 52 45 76 34 // APICr.....COREv4 0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45 // COREBOOT....CORE 0020: 28 06 23 20 00 00 E0 FE FD FE 39 C2 01 0C 00 00 // (.# ......9..... 0030: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................ 0040: 05 00 02 0A 00 09 09 00 00 00 0D 00 00 08 00 00 // ................ 0050: 01 00 00 00 00 08 01 02 01 00 00 00 00 08 02 04 // ................ 0060: 01 00 00 00 00 08 03 06 01 00 00 00 04 06 FF 05 // ................ 0070: 00 01 // .. BGRT ---- [000h 0000 004h] Signature : "BGRT" [Boot Graphics Resource Table] [004h 0004 004h] Table Length : 00000038 [008h 0008 001h] Revision : 01 [009h 0009 001h] Checksum : 96 [00Ah 0010 006h] Oem ID : "INTEL " [010h 0016 008h] Oem Table ID : "EDK2 " [018h 0024 004h] Oem Revision : 00000002 [01Ch 0028 004h] Asl Compiler ID : " " [020h 0032 004h] Asl Compiler Revision : 01000013 [024h 0036 002h] Version : 0001 [026h 0038 001h] Status (decoded below) : 01 Displayed : 1 Orientation Offset : 0 [027h 0039 001h] Image Type : 00 [028h 0040 008h] Image Address : 000000007352A018 [030h 0048 004h] Image OffsetX : 0000025C [034h 0052 004h] Image OffsetY : 0000016C Raw Table Data: Length 56 (0x38) 0000: 42 47 52 54 38 00 00 00 01 96 49 4E 54 45 4C 20 // BGRT8.....INTEL 0010: 45 44 4B 32 20 20 20 20 02 00 00 00 20 20 20 20 // EDK2 .... 0020: 13 00 00 01 01 00 01 00 18 A0 52 73 00 00 00 00 // ..........Rs.... 0030: 5C 02 00 00 6C 01 00 00 // \...l... DBG2 ---- [000h 0000 004h] Signature : "DBG2" [Debug Port Table type 2] [004h 0004 004h] Table Length : 00000061 [008h 0008 001h] Revision : 00 [009h 0009 001h] Checksum : B0 [00Ah 0010 006h] Oem ID : "COREv4" [010h 0016 008h] Oem Table ID : "COREBOOT" [018h 0024 004h] Oem Revision : 00000000 [01Ch 0028 004h] Asl Compiler ID : "CORE" [020h 0032 004h] Asl Compiler Revision : 20230628 [024h 0036 004h] Info Offset : 0000002C [028h 0040 004h] Info Count : 00000001 [02Ch 0044 001h] Revision : 00 [02Dh 0045 002h] Length : 0035 [02Fh 0047 001h] Register Count : 01 [030h 0048 002h] Namepath Length : 000F [032h 0050 002h] Namepath Offset : 0026 [034h 0052 002h] OEM Data Length : 0000 [Optional field not present] [036h 0054 002h] OEM Data Offset : 0000 [Optional field not present] [038h 0056 002h] Port Type : 8000 [03Ah 0058 002h] Port Subtype : 0012 [03Ch 0060 002h] Reserved : 0000 [03Eh 0062 002h] Base Address Offset : 0016 [040h 0064 002h] Address Size Offset : 0022 [042h 0066 00Ch] Base Address Register : [Generic Address Structure] [042h 0066 001h] Space ID : 00 [SystemMemory] [043h 0067 001h] Bit Width : 00 [044h 0068 001h] Bit Offset : 00 [045h 0069 001h] Encoded Access Width : 03 [DWord Access:32] [046h 0070 008h] Address : 00000000FE03E000 [04Eh 0078 004h] Address Size : 00001000 [052h 0082 00Fh] Namepath : "\_SB.PCI0.UAR0" Raw Table Data: Length 97 (0x61) 0000: 44 42 47 32 61 00 00 00 00 B0 43 4F 52 45 76 34 // DBG2a.....COREv4 0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45 // COREBOOT....CORE 0020: 28 06 23 20 2C 00 00 00 01 00 00 00 00 35 00 01 // (.# ,........5.. 0030: 0F 00 26 00 00 00 00 00 00 80 12 00 00 00 16 00 // ..&............. 0040: 22 00 00 00 00 03 00 E0 03 FE 00 00 00 00 00 10 // "............... 0050: 00 00 5C 5F 53 42 2E 50 43 49 30 2E 55 41 52 30 // ..\_SB.PCI0.UAR0 0060: 00 // . DMAR ---- [000h 0000 004h] Signature : "DMAR" [DMA Remapping Table] [004h 0004 004h] Table Length : 00000088 [008h 0008 001h] Revision : 01 [009h 0009 001h] Checksum : 97 [00Ah 0010 006h] Oem ID : "COREv4" [010h 0016 008h] Oem Table ID : "COREBOOT" [018h 0024 004h] Oem Revision : 00000000 [01Ch 0028 004h] Asl Compiler ID : "CORE" [020h 0032 004h] Asl Compiler Revision : 20230628 [024h 0036 001h] Host Address Width : 26 [025h 0037 001h] Flags : 05 [026h 0038 00Ah] Reserved : 00 00 00 00 00 00 00 00 00 00 [030h 0048 002h] Subtable Type : 0000 [Hardware Unit Definition] [032h 0050 002h] Length : 0018 [034h 0052 001h] Flags : 00 [035h 0053 001h] Reserved : 00 [036h 0054 002h] PCI Segment Number : 0000 [038h 0056 008h] Register Base Address : 00000000FED90000 [040h 0064 001h] Device Scope Type : 01 [PCI Endpoint Device] [041h 0065 001h] Entry Length : 08 [042h 0066 002h] Reserved : 0000 [044h 0068 001h] Enumeration ID : 00 [045h 0069 001h] PCI Bus Number : 00 [046h 0070 002h] PCI Path : 02,00 [048h 0072 002h] Subtable Type : 0000 [Hardware Unit Definition] [04Ah 0074 002h] Length : 0020 [04Ch 0076 001h] Flags : 01 [04Dh 0077 001h] Reserved : 00 [04Eh 0078 002h] PCI Segment Number : 0000 [050h 0080 008h] Register Base Address : 00000000FED91000 [058h 0088 001h] Device Scope Type : 03 [IOAPIC Device] [059h 0089 001h] Entry Length : 08 [05Ah 0090 002h] Reserved : 0000 [05Ch 0092 001h] Enumeration ID : 00 [05Dh 0093 001h] PCI Bus Number : 00 [05Eh 0094 002h] PCI Path : 1E,07 [060h 0096 001h] Device Scope Type : 04 [Message-capable HPET Device] [061h 0097 001h] Entry Length : 08 [062h 0098 002h] Reserved : 0000 [064h 0100 001h] Enumeration ID : 00 [065h 0101 001h] PCI Bus Number : 00 [066h 0102 002h] PCI Path : 1E,06 [068h 0104 002h] Subtable Type : 0001 [Reserved Memory Region] [06Ah 0106 002h] Length : 0020 [06Ch 0108 002h] Reserved : 0000 [06Eh 0110 002h] PCI Segment Number : 0000 [070h 0112 008h] Base Address : 000000007C000000 [078h 0120 008h] End Address (limit) : 00000000803FFFFF [080h 0128 001h] Device Scope Type : 01 [PCI Endpoint Device] [081h 0129 001h] Entry Length : 08 [082h 0130 002h] Reserved : 0000 [084h 0132 001h] Enumeration ID : 00 [085h 0133 001h] PCI Bus Number : 00 [086h 0134 002h] PCI Path : 02,00 Raw Table Data: Length 136 (0x88) 0000: 44 4D 41 52 88 00 00 00 01 97 43 4F 52 45 76 34 // DMAR......COREv4 0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45 // COREBOOT....CORE 0020: 28 06 23 20 26 05 00 00 00 00 00 00 00 00 00 00 // (.# &........... 0030: 00 00 18 00 00 00 00 00 00 00 D9 FE 00 00 00 00 // ................ 0040: 01 08 00 00 00 00 02 00 00 00 20 00 01 00 00 00 // .......... ..... 0050: 00 10 D9 FE 00 00 00 00 03 08 00 00 00 00 1E 07 // ................ 0060: 04 08 00 00 00 00 1E 06 01 00 20 00 00 00 00 00 // .......... ..... 0070: 00 00 00 7C 00 00 00 00 FF FF 3F 80 00 00 00 00 // ...|......?..... 0080: 01 08 00 00 00 00 02 00 // ........ DSDT ---- DefinitionBlock ("", "DSDT", 2, "COREv4", "COREBOOT", 0x20220930) { External (_SB_.CNOT, MethodObj) // 1 Arguments External (_SB_.MPTS, MethodObj) // 1 Arguments External (_SB_.MWAK, MethodObj) // 1 Arguments External (_SB_.PCI0.A4GB, IntObj) External (_SB_.PCI0.A4GS, IntObj) External (_SB_.PCI0.EGPM, MethodObj) // 0 Arguments External (_SB_.PCI0.GFX0.LCD0, DeviceObj) External (_SB_.PCI0.LPCB.EC0_.PTS_, MethodObj) // 1 Arguments External (_SB_.PCI0.LPCB.EC0_.WAK_, MethodObj) // 1 Arguments External (_SB_.PCI0.RGPM, MethodObj) // 0 Arguments External (A4GB, IntObj) External (A4GS, IntObj) External (DNVS, OpRegionObj) External (GNVS, OpRegionObj) External (OSFG, IntObj) Scope (\) { OperationRegion (GNVS, SystemMemory, 0x76FFE860, 0x38) } Name (OSYS, Zero) Name (PICM, Zero) Name (PWRS, One) Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model { PICM = Arg0 } Scope (_SB) { Name (PCBA, 0xC0000000) Name (PCLN, 0x10000000) OperationRegion (PCFG, SystemMemory, PCBA, PCLN) Device (PERC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RBUF, ResourceTemplate () { QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x0000000000000001, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000000000002, // Length ,, _Y00, AddressRangeMemory, TypeStatic) }) CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._MIN, MIN1) // _MIN: Minimum Base Address CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._MAX, MAX1) // _MAX: Maximum Base Address CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._LEN, LEN1) // _LEN: Length MIN1 = 0xC0000000 MAX1 = ((MIN1 + 0x10000000) - One) LEN1 = 0x10000000 Return (RBUF) /* \_SB_.PERC._CRS.RBUF */ } } } Scope (_SB) { Method (_SWS, 0, NotSerialized) // _SWS: System Wake Source { Return (PM1I) /* \PM1I */ } } Scope (_GPE) { Method (_SWS, 0, NotSerialized) // _SWS: System Wake Source { Return (GPEI) /* \GPEI */ } } OperationRegion (POST, SystemIO, 0x80, One) Field (POST, ByteAcc, Lock, Preserve) { DBG0, 8 } Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep { DBG0 = 0x96 If (CondRefOf (\_SB.PCI0.LPCB.EC0.PTS)) { \_SB.PCI0.LPCB.EC0.PTS (Arg0) } If (CondRefOf (\_SB.MPTS)) { \_SB.MPTS (Arg0) } If (CondRefOf (\_SB.PCI0.EGPM)) { \_SB.PCI0.EGPM () } } Method (_WAK, 1, NotSerialized) // _WAK: Wake { DBG0 = 0x97 If (CondRefOf (\_SB.PCI0.LPCB.EC0.WAK)) { \_SB.PCI0.LPCB.EC0.WAK (Arg0) } If (CondRefOf (\_SB.MWAK)) { \_SB.MWAK (Arg0) } If (CondRefOf (\_SB.PCI0.RGPM)) { \_SB.PCI0.RGPM () } Return (Package (0x02) { Zero, Zero }) } Field (GNVS, ByteAcc, NoLock, Preserve) { Offset (0x02), SMIF, 8, Offset (0x04), PPCM, 8, TLVL, 8, LIDS, 8, Offset (0x08), Offset (0x0C), PM1I, 64, GPEI, 64, DPTE, 8, NHLA, 64, NHLL, 32, Offset (0x2B), U2WE, 16, U3WE, 16, UIOR, 8, Offset (0x38) } Method (PNOT, 0, NotSerialized) { \_SB.CNOT (0x81) } Method (PPCN, 0, NotSerialized) { \_SB.CNOT (0x80) } Method (TNOT, 0, NotSerialized) { \_SB.CNOT (0x82) } Device (_SB.PCI0) { Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID Name (_SEG, Zero) // _SEG: PCI Segment Name (_UID, Zero) // _UID: Unique ID Device (MCHC) { Name (_ADR, Zero) // _ADR: Address OperationRegion (MCHP, PCI_Config, Zero, 0x0100) Field (MCHP, DWordAcc, NoLock, Preserve) { Offset (0x40), EPEN, 1, , 11, EPBR, 20, Offset (0x48), MHEN, 1, , 14, MHBR, 17, Offset (0x60), PXEN, 1, PXSZ, 2, , 23, PXBR, 6, Offset (0x68), DIEN, 1, , 11, DIBR, 20, Offset (0xA0), TOM, 64, TUUD, 64, Offset (0xBC), TLUD, 32 } } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (MCRS, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000CF7, // Range Maximum 0x00000000, // Translation Offset 0x00000CF8, // Length ,, , TypeStatic, DenseTranslation) IO (Decode16, 0x0CF8, // Range Minimum 0x0CF8, // Range Maximum 0x01, // Alignment 0x08, // Length ) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000D00, // Range Minimum 0x0000FFFF, // Range Maximum 0x00000000, // Translation Offset 0x0000F300, // Length ,, , TypeStatic, DenseTranslation) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000A0000, // Range Minimum 0x000BFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00020000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C0000, // Range Minimum 0x000C3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C4000, // Range Minimum 0x000C7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C8000, // Range Minimum 0x000CBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000CC000, // Range Minimum 0x000CFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D0000, // Range Minimum 0x000D3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D4000, // Range Minimum 0x000D7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D8000, // Range Minimum 0x000DBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000DC000, // Range Minimum 0x000DFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E0000, // Range Minimum 0x000E3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E4000, // Range Minimum 0x000E7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E8000, // Range Minimum 0x000EBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000EC000, // Range Minimum 0x000EFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000F0000, // Range Minimum 0x000FFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00010000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0xDFFFFFFF, // Range Maximum 0x00000000, // Translation Offset 0xE0000000, // Length ,, _Y01, AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000010000, // Range Minimum 0x000000000001FFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000000010000, // Length ,, _Y02, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0xFC800000, // Range Minimum 0xFE7FFFFF, // Range Maximum 0x00000000, // Translation Offset 0x02000000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0xFED40000, // Range Minimum 0xFED47FFF, // Range Maximum 0x00000000, // Translation Offset 0x00008000, // Length ,, , AddressRangeMemory, TypeStatic) }) CreateDWordField (MCRS, \_SB.PCI0._CRS._Y01._MIN, PMIN) // _MIN: Minimum Base Address CreateDWordField (MCRS, \_SB.PCI0._CRS._Y01._MAX, PMAX) // _MAX: Maximum Base Address CreateDWordField (MCRS, \_SB.PCI0._CRS._Y01._LEN, PLEN) // _LEN: Length PMIN = (^MCHC.TLUD & 0xFFF00000) PLEN = ((PMAX - PMIN) + One) If ((A4GS == Zero)) { CreateQWordField (MCRS, \_SB.PCI0._CRS._Y02._LEN, MSEN) // _LEN: Length MSEN = Zero } Else { CreateQWordField (MCRS, \_SB.PCI0._CRS._Y02._MIN, MMIN) // _MIN: Minimum Base Address CreateQWordField (MCRS, \_SB.PCI0._CRS._Y02._MAX, MMAX) // _MAX: Maximum Base Address CreateQWordField (MCRS, \_SB.PCI0._CRS._Y02._LEN, MLEN) // _LEN: Length MLEN = A4GS /* External reference */ MMIN = A4GB /* External reference */ MMAX = ((MMIN + MLEN) - One) } Return (MCRS) /* \_SB_.PCI0._CRS.MCRS */ } Method (GMHB, 0, Serialized) { Local0 = (^MCHC.MHBR << 0x0F) Return (Local0) } Method (GEPB, 0, Serialized) { Local0 = (^MCHC.EPBR << 0x0C) Return (Local0) } Method (GPCB, 0, Serialized) { Local0 = (^MCHC.PXBR << 0x1A) Return (Local0) } Method (GPCL, 0, Serialized) { Local0 = (0x10000000 >> ^MCHC.PXSZ) /* \_SB_.PCI0.MCHC.PXSZ */ Return (Local0) } Method (GDMB, 0, Serialized) { Local0 = (^MCHC.DIBR << 0x0C) Return (Local0) } Device (PDRC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (BUF0, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00020000, // Address Length _Y03) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y04) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y05) Memory32Fixed (ReadOnly, 0xFED90000, // Address Base 0x00004000, // Address Length ) Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x01000000, // Address Length _Y06) Memory32Fixed (ReadOnly, 0xF8000000, // Address Base 0x02000000, // Address Length ) Memory32Fixed (ReadOnly, 0xFEE00000, // Address Base 0x00100000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED00000, // Address Base 0x00000400, // Address Length ) }) CreateDWordField (BUF0, \_SB.PCI0.PDRC._CRS._Y03._BAS, MBR0) // _BAS: Base Address MBR0 = GMHB () CreateDWordField (BUF0, \_SB.PCI0.PDRC._CRS._Y04._BAS, DBR0) // _BAS: Base Address DBR0 = GDMB () CreateDWordField (BUF0, \_SB.PCI0.PDRC._CRS._Y05._BAS, EBR0) // _BAS: Base Address EBR0 = GEPB () CreateDWordField (BUF0, \_SB.PCI0.PDRC._CRS._Y06._BAS, FBR0) // _BAS: Base Address FBR0 = 0xFF000000 Return (BUF0) /* \_SB_.PCI0.PDRC._CRS.BUF0 */ } } Device (GFX0) { Name (_ADR, 0x00020000) // _ADR: Address } Method (GPCR, 2, NotSerialized) { If ((Arg0 == Zero)) { Local0 = 0xFD000000 } ElseIf ((Arg0 == One)) { Local0 = Zero } Else { Debug = Concatenate (Concatenate ("Invalid Die index (", Arg0), ")\n") Return (Zero) } Return ((Local0 + (Arg1 << 0x10))) } Method (RPCR, 3, Serialized) { OperationRegion (PCRD, SystemMemory, (GPCR (Arg0, Arg1) + Arg2), 0x04) Field (PCRD, DWordAcc, NoLock, Preserve) { DATA, 32 } Return (DATA) /* \_SB_.PCI0.RPCR.DATA */ } Method (APCR, 4, Serialized) { OperationRegion (PCRD, SystemMemory, (GPCR (Arg0, Arg1) + Arg2), 0x04) Field (PCRD, DWordAcc, NoLock, Preserve) { DATA, 32 } DATA &= Arg3 RPCR (Arg0, Arg1, Arg2) } Method (OPCR, 4, Serialized) { OperationRegion (PCRD, SystemMemory, (GPCR (Arg0, Arg1) + Arg2), 0x04) Field (PCRD, DWordAcc, NoLock, Preserve) { DATA, 32 } DATA |= Arg3 RPCR (Arg0, Arg1, Arg2) } Method (PCRB, 1, NotSerialized) { Return (GPCR (Zero, Arg0)) } Method (PCRR, 2, Serialized) { Return (RPCR (Zero, Arg0, Arg1)) } Method (PCRA, 3, Serialized) { APCR (Zero, Arg0, Arg1, Arg2) } Method (PCRO, 3, Serialized) { OPCR (Zero, Arg0, Arg1, Arg2) } Scope (\_SB.PCI0) { Name (ICKB, Zero) ICKB = (PCRB (0xAD) + 0x8000) Method (RAOW, 3, Serialized) { OperationRegion (ICLK, SystemMemory, (ICKB + (Arg0 * 0x0C)), 0x04) Field (ICLK, AnyAcc, NoLock, Preserve) { VAL0, 32 } Local0 = VAL0 /* \_SB_.PCI0.RAOW.VAL0 */ VAL0 = ((Local0 & Arg1) | Arg2) } Method (MCON, 2, NotSerialized) { RAOW (Arg0, 0xFFFFFFFFFFFFFFFE, Arg1) RAOW (Arg0, 0xFFFFFFFFFFFFFFFD, 0x02) } Method (MCOF, 1, NotSerialized) { RAOW (Arg0, 0xFFFFFFFFFFFFFFFD, Zero) } } Method (CGPM, 2, Serialized) { Local0 = GPID (Arg0) If ((Local0 != Zero)) { PCRA (Local0, 0x10, 0xFFFFFFFFFFFFFF00) PCRO (Local0, 0x10, (Arg1 & 0xFF)) } } Method (GRXS, 1, Serialized) { OperationRegion (PREG, SystemMemory, GADD (Arg0), 0x04) Field (PREG, AnyAcc, NoLock, Preserve) { , 1, RXST, 1 } Return (RXST) /* \_SB_.PCI0.GRXS.RXST */ } Method (GTXS, 1, Serialized) { OperationRegion (PREG, SystemMemory, GADD (Arg0), 0x04) Field (PREG, AnyAcc, NoLock, Preserve) { TXST, 1 } Return (TXST) /* \_SB_.PCI0.GTXS.TXST */ } Method (STXS, 1, Serialized) { OperationRegion (PREG, SystemMemory, GADD (Arg0), 0x04) Field (PREG, AnyAcc, NoLock, Preserve) { TXST, 1 } TXST = One } Method (CTXS, 1, Serialized) { OperationRegion (PREG, SystemMemory, GADD (Arg0), 0x04) Field (PREG, AnyAcc, NoLock, Preserve) { TXST, 1 } TXST = Zero } Method (GPMO, 2, Serialized) { OperationRegion (PREG, SystemMemory, GADD (Arg0), 0x04) Field (PREG, AnyAcc, NoLock, Preserve) { , 10, MODE, 3 } MODE = Arg1 } Method (GTXE, 2, Serialized) { OperationRegion (PREG, SystemMemory, GADD (Arg0), 0x04) Field (PREG, AnyAcc, NoLock, Preserve) { Offset (0x01), TXDI, 1 } TXDI = !Arg1 } Method (GRXE, 2, Serialized) { OperationRegion (PREG, SystemMemory, GADD (Arg0), 0x04) Field (PREG, AnyAcc, NoLock, Preserve) { , 9, RXDI, 1 } RXDI = !Arg1 } Method (GSCI, 2, Serialized) { OperationRegion (PREG, SystemMemory, GADD (Arg0), 0x04) Field (PREG, AnyAcc, NoLock, Preserve) { , 19, SCIR, 1 } SCIR = Arg1 } Device (GPIO) { Name (_HID, "INTC1057") // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Name (_DDN, "GPIO Controller") // _DDN: DOS Device Name Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y07) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y08) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y09) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y0A) Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, ) { 0x0000000E, } }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { CreateDWordField (RBUF, \_SB.PCI0.GPIO._Y07._BAS, BAS0) // _BAS: Base Address CreateDWordField (RBUF, \_SB.PCI0.GPIO._Y07._LEN, LEN0) // _LEN: Length BAS0 = PCRB (0x6E) LEN0 = 0x00010000 CreateDWordField (RBUF, \_SB.PCI0.GPIO._Y08._BAS, BAS1) // _BAS: Base Address CreateDWordField (RBUF, \_SB.PCI0.GPIO._Y08._LEN, LEN1) // _LEN: Length BAS1 = PCRB (0x6D) LEN1 = 0x00010000 CreateDWordField (RBUF, \_SB.PCI0.GPIO._Y09._BAS, BAS4) // _BAS: Base Address CreateDWordField (RBUF, \_SB.PCI0.GPIO._Y09._LEN, LEN4) // _LEN: Length BAS4 = PCRB (0x6A) LEN4 = 0x00010000 CreateDWordField (RBUF, \_SB.PCI0.GPIO._Y0A._BAS, BAS5) // _BAS: Base Address CreateDWordField (RBUF, \_SB.PCI0.GPIO._Y0A._LEN, LEN5) // _LEN: Length BAS5 = PCRB (0x69) LEN5 = 0x00010000 Return (RBUF) /* \_SB_.PCI0.GPIO.RBUF */ } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } } Method (GADD, 1, NotSerialized) { If (((Arg0 >= Zero) && (Arg0 <= 0x42))) { Local0 = 0x6E Local1 = (Arg0 - Zero) } If (((Arg0 >= 0x43) && (Arg0 <= 0xA8))) { Local0 = 0x6D Local1 = (Arg0 - 0x43) } If (((Arg0 >= 0xA9) && (Arg0 <= 0xB9))) { Local0 = 0x6C Local1 = (Arg0 - 0xA9) } If (((Arg0 >= 0xBA) && (Arg0 <= 0x0124))) { Local0 = 0x6B Local1 = (Arg0 - 0xBA) } If (((Arg0 >= 0x0125) && (Arg0 <= 0x0174))) { Local0 = 0x6A Local1 = (Arg0 - 0x0125) } If (((Arg0 >= 0x0175) && (Arg0 <= 0x0184))) { Local0 = 0x69 Local1 = (Arg0 - 0x0175) } Local2 = ((PCRB (Local0) + 0x0700) + (Local1 * 0x10)) Return (Local2) } Method (GPID, 1, Serialized) { Switch (ToInteger (Arg0)) { Case (Zero) { Local0 = 0x6E } Case (One) { Local0 = 0x6D } Case (0x02) { Local0 = 0x6C } Case (0x03) { Local0 = 0x6B } Case (0x04) { Local0 = 0x6A } Case (0x05) { Local0 = 0x69 } Default { Return (Zero) } } Return (Local0) } Name (GPMB, Package (0x06) { Zero, Zero, Zero, Zero, Zero, Zero }) Method (SGPM, 0, Serialized) { Local0 = Zero While ((Local0 < 0x06)) { Local1 = GPID (Local0) GPMB [Local0] = PCRR (Local1, 0x10) Local0++ } } Method (RGPM, 0, Serialized) { Local0 = Zero While ((Local0 < 0x06)) { CGPM (Local0, DerefOf (GPMB [Local0])) Local0++ } } Method (EGPM, 0, Serialized) { SGPM () Local0 = Zero While ((Local0 < 0x06)) { CGPM (Local0, 0xFF) Local0++ } } Device (LPCB) { Name (_ADR, 0x001F0000) // _ADR: Address Name (_DDN, "LPC Bus Device") // _DDN: DOS Device Name Device (DMAC) { Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0x0081, // Range Minimum 0x0081, // Range Maximum 0x01, // Alignment 0x11, // Length ) IO (Decode16, 0x0093, // Range Minimum 0x0093, // Range Maximum 0x01, // Alignment 0x0D, // Length ) IO (Decode16, 0x00C0, // Range Minimum 0x00C0, // Range Maximum 0x01, // Alignment 0x20, // Length ) DMA (Compatibility, NotBusMaster, Transfer8_16, ) {4} }) } Device (FWH) { Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID Name (_DDN, "Firmware Hub") // _DDN: DOS Device Name Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadOnly, 0xFF000000, // Address Base 0x01000000, // Address Length ) }) } Device (HPET) { Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0C01") /* System Board */) // _CID: Compatible ID Name (_DDN, "High Precision Event Timer") // _DDN: DOS Device Name Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0xFED00000, // Address Base 0x00000400, // Address Length ) }) Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } } Device (MATH) { Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x00F0, // Range Minimum 0x00F0, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {13} }) } Device (PIC) { Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID Name (_DDN, "8259 Interrupt Controller") // _DDN: DOS Device Name Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0020, // Range Minimum 0x0020, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0024, // Range Minimum 0x0024, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0028, // Range Minimum 0x0028, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x002C, // Range Minimum 0x002C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0030, // Range Minimum 0x0030, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0034, // Range Minimum 0x0034, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0038, // Range Minimum 0x0038, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x003C, // Range Minimum 0x003C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A0, // Range Minimum 0x00A0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A4, // Range Minimum 0x00A4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A8, // Range Minimum 0x00A8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00AC, // Range Minimum 0x00AC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B0, // Range Minimum 0x00B0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B4, // Range Minimum 0x00B4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B8, // Range Minimum 0x00B8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00BC, // Range Minimum 0x00BC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IRQNoFlags () {2} }) } Device (LDRC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (_DDN, "Legacy Device Resources") // _DDN: DOS Device Name Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x002E, // Range Minimum 0x002E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x004E, // Range Minimum 0x004E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0061, // Range Minimum 0x0061, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0063, // Range Minimum 0x0063, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0065, // Range Minimum 0x0065, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0067, // Range Minimum 0x0067, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0092, // Range Minimum 0x0092, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x00B2, // Range Minimum 0x00B2, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x1800, // Range Minimum 0x1800, // Range Maximum 0x01, // Alignment 0xFF, // Length ) }) } Device (RTC) { Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID Name (_DDN, "Real Time Clock") // _DDN: DOS Device Name Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x01, // Alignment 0x08, // Length ) }) } Device (TIMR) { Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID Name (_DDN, "8254 Timer") // _DDN: DOS Device Name Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x0050, // Range Minimum 0x0050, // Range Maximum 0x10, // Alignment 0x04, // Length ) IRQNoFlags () {0} }) } } Device (HDAS) { Name (_ADR, 0x001F0003) // _ADR: Address Name (_DDN, "Audio Controller") // _DDN: DOS Device Name Name (UUID, ToUUID ("a69f886e-6ceb-4594-a41f-7b5dce24c553") /* Unknown UUID */) Name (_S0W, 0x03) // _S0W: S0 Device Wake State Name (NBUF, ResourceTemplate () { QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadOnly, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x0000000000000000, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000000000001, // Length ,, _Y0B, AddressRangeACPI, TypeStatic) }) Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If ((Arg0 == UUID)) { If ((Arg2 == Zero)) { If ((((Arg1 == One) && (NHLA != Zero)) && ( NHLL != Zero))) { Return (Buffer (One) { 0x03 // . }) } Else { Return (Buffer (One) { 0x01 // . }) } } If ((Arg2 == One)) { CreateQWordField (NBUF, \_SB.PCI0.HDAS._Y0B._MIN, NBAS) // _MIN: Minimum Base Address CreateQWordField (NBUF, \_SB.PCI0.HDAS._Y0B._MAX, NMAS) // _MAX: Maximum Base Address CreateQWordField (NBUF, \_SB.PCI0.HDAS._Y0B._LEN, NLEN) // _LEN: Length NBAS = NHLA /* \NHLA */ NMAS = NHLA /* \NHLA */ NLEN = NHLL /* \NHLL */ Return (NBUF) /* \_SB_.PCI0.HDAS.NBUF */ } } Return (Buffer (One) { 0x00 // . }) } } Method (IRQM, 1, Serialized) { Name (IQAA, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x10 }, Package (0x04) { 0xFFFF, One, Zero, 0x11 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x13 } }) Name (IQAP, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x0B }, Package (0x04) { 0xFFFF, One, Zero, 0x0A }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x0B }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x0B } }) Name (IQBA, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x11 }, Package (0x04) { 0xFFFF, One, Zero, 0x12 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x13 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x10 } }) Name (IQBP, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x0A }, Package (0x04) { 0xFFFF, One, Zero, 0x0B }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x0B }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x0B } }) Name (IQCA, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x12 }, Package (0x04) { 0xFFFF, One, Zero, 0x13 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x10 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x11 } }) Name (IQCP, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x0B }, Package (0x04) { 0xFFFF, One, Zero, 0x0B }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x0B }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x0A } }) Name (IQDA, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x13 }, Package (0x04) { 0xFFFF, One, Zero, 0x10 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x11 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x12 } }) Name (IQDP, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x0B }, Package (0x04) { 0xFFFF, One, Zero, 0x0B }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x0A }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x0B } }) Switch (ToInteger (Arg0)) { Case (Package (0x07) { One, 0x05, 0x09, 0x0D, 0x11, 0x15, 0x19 } ) { If (PICM) { Return (IQAA) /* \_SB_.PCI0.IRQM.IQAA */ } Else { Return (IQAP) /* \_SB_.PCI0.IRQM.IQAP */ } } Case (Package (0x07) { 0x02, 0x06, 0x0A, 0x0E, 0x12, 0x16, 0x1A } ) { If (PICM) { Return (IQBA) /* \_SB_.PCI0.IRQM.IQBA */ } Else { Return (IQBP) /* \_SB_.PCI0.IRQM.IQBP */ } } Case (Package (0x07) { 0x03, 0x07, 0x0B, 0x0F, 0x13, 0x17, 0x1B } ) { If (PICM) { Return (IQCA) /* \_SB_.PCI0.IRQM.IQCA */ } Else { Return (IQCP) /* \_SB_.PCI0.IRQM.IQCP */ } } Case (Package (0x07) { 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C } ) { If (PICM) { Return (IQDA) /* \_SB_.PCI0.IRQM.IQDA */ } Else { Return (IQDP) /* \_SB_.PCI0.IRQM.IQDP */ } } Default { If (PICM) { Return (IQDA) /* \_SB_.PCI0.IRQM.IQDA */ } Else { Return (IQDP) /* \_SB_.PCI0.IRQM.IQDP */ } } } } Device (RP01) { Name (_ADR, 0x001C0000) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP02) { Name (_ADR, 0x001C0001) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP03) { Name (_ADR, 0x001C0002) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP04) { Name (_ADR, 0x001C0003) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP05) { Name (_ADR, 0x001C0004) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP06) { Name (_ADR, 0x001C0005) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP07) { Name (_ADR, 0x001C0006) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP08) { Name (_ADR, 0x001C0007) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP09) { Name (_ADR, 0x001D0000) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP10) { Name (_ADR, 0x001D0001) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP11) { Name (_ADR, 0x001D0002) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (RP12) { Name (_ADR, 0x001D0003) // _ADR: Address OperationRegion (RPCS, PCI_Config, 0x4C, 0x04) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x03), RPPN, 8 } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { Return (IRQM (RPPN)) } } Device (SRAM) { Name (_ADR, 0x00140002) // _ADR: Address } Device (HEC1) { Name (_ADR, 0x00160000) // _ADR: Address } Device (I2C0) { Name (_ADR, 0x00150000) // _ADR: Address Name (_DDN, "Serial IO I2C Controller 0") // _DDN: DOS Device Name } Device (I2C1) { Name (_ADR, 0x00150001) // _ADR: Address Name (_DDN, "Serial IO I2C Controller 1") // _DDN: DOS Device Name } Device (I2C2) { Name (_ADR, 0x00150002) // _ADR: Address Name (_DDN, "Serial IO I2C Controller 2") // _DDN: DOS Device Name } Device (I2C3) { Name (_ADR, 0x00150003) // _ADR: Address Name (_DDN, "Serial IO I2C Controller 3") // _DDN: DOS Device Name } Device (I2C4) { Name (_ADR, 0x00190000) // _ADR: Address Name (_DDN, "Serial IO I2C Controller 4") // _DDN: DOS Device Name } Device (I2C5) { Name (_ADR, 0x00190001) // _ADR: Address Name (_DDN, "Serial IO I2C Controller 5") // _DDN: DOS Device Name } Device (I2C6) { Name (_ADR, 0x00100000) // _ADR: Address Name (_DDN, "Serial IO I2C Controller 6") // _DDN: DOS Device Name } Device (I2C7) { Name (_ADR, 0x00100001) // _ADR: Address Name (_DDN, "Serial IO I2C Controller 7") // _DDN: DOS Device Name } Device (FSPI) { Name (_ADR, 0x001F0005) // _ADR: Address Name (_DDN, "Fast SPI") // _DDN: DOS Device Name } Device (SPI0) { Name (_ADR, 0x001E0002) // _ADR: Address Name (_DDN, "Serial IO SPI Controller 0") // _DDN: DOS Device Name } Device (SPI1) { Name (_ADR, 0x001E0003) // _ADR: Address Name (_DDN, "Serial IO SPI Controller 1") // _DDN: DOS Device Name } Device (SPI2) { Name (_ADR, 0x00120006) // _ADR: Address Name (_DDN, "Serial IO SPI Controller 2") // _DDN: DOS Device Name } Device (SPI3) { Name (_ADR, 0x00130000) // _ADR: Address Name (_DDN, "Serial IO SPI Controller 3") // _DDN: DOS Device Name } Device (UAR0) { Name (_ADR, 0x001E0000) // _ADR: Address Name (_DDN, "Serial IO UART Controller 0") // _DDN: DOS Device Name } Device (UAR1) { Name (_ADR, 0x001E0001) // _ADR: Address Name (_DDN, "Serial IO UART Controller 1") // _DDN: DOS Device Name } Device (UAR2) { Name (_ADR, 0x00190002) // _ADR: Address Name (_DDN, "Serial IO UART Controller 2") // _DDN: DOS Device Name } Device (UAR3) { Name (_ADR, 0x00110000) // _ADR: Address Name (_DDN, "Serial IO UART Controller 3") // _DDN: DOS Device Name } Scope (\_SB.PCI0) { Method (SCSC, 1, Serialized) { PCRA (Arg0, 0x1C20, Zero) PCRA (Arg0, 0x4820, Zero) } Device (EMMC) { Name (_ADR, 0x001A0000) // _ADR: Address Name (_DDN, "eMMC Controller") // _DDN: DOS Device Name Name (TEMP, Zero) OperationRegion (SCSR, PCI_Config, Zero, 0x0100) Field (SCSR, WordAcc, NoLock, Preserve) { Offset (0x84), PMCR, 16, Offset (0xA2), , 2, PGEN, 1 } Method (_INI, 0, NotSerialized) // _INI: Initialize { SCSC (0xA1) } Method (_PS0, 0, Serialized) // _PS0: Power State 0 { Stall (0x32) PGEN = Zero SCSC (0xA1) PMCR &= 0xFFFC TEMP = PMCR /* \_SB_.PCI0.EMMC.PMCR */ } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { PGEN = One PMCR |= 0x03 TEMP = PMCR /* \_SB_.PCI0.EMMC.PMCR */ } Device (CARD) { Name (_ADR, 0x08) // _ADR: Address Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (Zero) } } } } Scope (\_SB.PCI0) { Device (UFS) { Name (_ADR, 0x00120007) // _ADR: Address Name (_DDN, "UFS Controller") // _DDN: DOS Device Name Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "ref-clk-freq", 0x0124F800 } } }) Method (OCPD, 0, Serialized) { PCRA (0x50, 0x4020, Zero) PCRA (0x50, 0x4820, Zero) PCRA (0x50, 0x5C20, Zero) PCRA (0x50, 0x5820, Zero) PCRA (0x50, 0x1078, Zero) } OperationRegion (SCSR, PCI_Config, Zero, 0x0100) Field (SCSR, ByteAcc, NoLock, Preserve) { Offset (0x84), PSTA, 32, Offset (0xA2), , 2, PGEN, 1 } OperationRegion (PWMR, SystemMemory, 0xFE000000, 0x00010000) Field (PWMR, DWordAcc, NoLock, Preserve) { Offset (0x1B0C), , 18, LTRU, 1 } Method (ULTR, 1, Serialized) { LTRU = Arg0 } Method (_PS0, 0, Serialized) // _PS0: Power State 0 { PGEN = Zero PSTA &= 0xFFFFFFFC ULTR (Zero) OCPD () } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { ULTR (One) PGEN = One } Method (_INI, 0, NotSerialized) // _INI: Initialize { OCPD () } } } Device (SBUS) { Name (_ADR, 0x001F0004) // _ADR: Address } Device (ISHB) { Name (_ADR, 0x00120000) // _ADR: Address Name (_DDN, "Integrated Sensor Hub Controller") // _DDN: DOS Device Name } Method (UPWE, 3, Serialized) { Local0 = (Arg1 + ((Arg0 - One) * 0x10)) OperationRegion (PSCR, SystemMemory, ((Arg2 << 0x10) + Local0), 0x10) Field (PSCR, DWordAcc, NoLock, Preserve) { PSCT, 32 } Local0 = PSCT /* \_SB_.PCI0.UPWE.PSCT */ Local0 &= 0xFFFFFFFF7F01FFED Local0 |= 0x06000000 PSCT = Local0 } Method (UWES, 3, Serialized) { Local0 = Arg0 While (One) { FindSetRightBit (Local0, Local1) If ((Local1 == Zero)) { Break } UPWE (Local1, Arg1, Arg2) Local0 &= (Local0 - One) } } Device (XHCI) { Name (_ADR, 0x00140000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x6D, 0x03 }) OperationRegion (XPRT, PCI_Config, Zero, 0x0100) Field (XPRT, AnyAcc, NoLock, Preserve) { Offset (0x10), Offset (0x12), XMEM, 16 } Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake { UWES ((U2WE & 0x0FFF), 0x0480, XMEM) UWES ((U3WE & 0x3F), 0x0540, XMEM) } Name (_S3D, 0x03) // _S3D: S3 Device State Name (_S0W, 0x03) // _S0W: S0 Device Wake State Name (_S3W, 0x03) // _S3W: S3 Device Wake State Method (_PS0, 0, Serialized) // _PS0: Power State 0 { } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { } Device (RHUB) { Name (_ADR, Zero) // _ADR: Address Device (HS01) { Name (_ADR, One) // _ADR: Address } Device (HS02) { Name (_ADR, 0x02) // _ADR: Address } Device (HS03) { Name (_ADR, 0x03) // _ADR: Address } Device (HS04) { Name (_ADR, 0x04) // _ADR: Address } Device (HS05) { Name (_ADR, 0x05) // _ADR: Address } Device (HS06) { Name (_ADR, 0x06) // _ADR: Address } Device (HS07) { Name (_ADR, 0x07) // _ADR: Address } Device (HS08) { Name (_ADR, 0x08) // _ADR: Address } Device (HS09) { Name (_ADR, 0x09) // _ADR: Address } Device (HS10) { Name (_ADR, 0x0A) // _ADR: Address } Device (SS01) { Name (_ADR, 0x0D) // _ADR: Address } Device (SS02) { Name (_ADR, 0x0E) // _ADR: Address } Device (SS03) { Name (_ADR, 0x0F) // _ADR: Address } Device (SS04) { Name (_ADR, 0x10) // _ADR: Address } } } Scope (\_SB.PCI0) { Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { Return (Arg3) } Else { CreateDWordField (Arg3, Zero, CDW1) CDW1 |= 0x04 Return (Arg3) } } } Device (GLAN) { Name (_ADR, 0x001F0006) // _ADR: Address Name (_S0W, 0x03) // _S0W: S0 Device Wake State Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x6D, 0x04 }) Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake { } } Scope (\_SB) { Method (BASE, 1, NotSerialized) { Local0 = (Arg0 & 0x07) Local1 = ((Arg0 >> 0x10) & 0x1F) Local2 = ((Local0 << 0x0C) + (Local1 << 0x0F)) Local3 = (^PCI0.GPCB () + Local2) Return (Local3) } OperationRegion (PMIO, SystemIO, 0x1800, 0x80) Field (PMIO, ByteAcc, NoLock, Preserve) { Offset (0x6C), , 19, CPWS, 1, Offset (0x7C), , 19, CPWE, 1 } Name (C2PW, Zero) Method (C2PM, 4, NotSerialized) { Local0 = (One << Arg3) If ((Arg0 && Arg1)) { If ((CPWE == Zero)) { If (CPWS) { CPWS = One } CPWE = One } If (((C2PW & Local0) == Zero)) { C2PW |= Local0 } } ElseIf ((Arg0 || Arg2)) { If ((CPWE == Zero)) { If (CPWS) { CPWS = One } CPWE = One } If (((C2PW & Local0) == Zero)) { C2PW |= Local0 } } Else { If (((C2PW & Local0) != Zero)) { C2PW &= ~Local0 } If (((CPWE != Zero) && (C2PW == Zero))) { CPWE = Zero } } Return (Zero) } Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1) If ((Arg0 == ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /* Platform-wide Capabilities */)) { If ((Arg1 != One)) { CDW1 |= 0x08 } Return (Arg3) } Else { CDW1 |= 0x04 Return (Arg3) } } } Scope (_GPE) { Method (_L61, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { Sleep (0x64) If (CondRefOf (\_SB.PCI0.TXHC)) { \_SB.PCI0.TRP0.HPEV () \_SB.PCI0.TRP1.HPEV () \_SB.PCI0.TRP2.HPEV () \_SB.PCI0.TRP3.HPEV () } If (((\_SB.PCI0.TRP0.VDID != 0xFFFFFFFF) && \_SB.PCI0.TRP0.HPSX)) { If (\_SB.PCI0.TRP0.PDCX) { \_SB.PCI0.TRP0.PDCX = One \_SB.PCI0.TRP0.HPSX = One If (!\_SB.PCI0.TRP0.PDSX) { \_SB.PCI0.TRP0.L0SE = Zero } Notify (\_SB.PCI0.TRP0, Zero) // Bus Check } Else { \_SB.PCI0.TRP0.HPSX = One } } If (((\_SB.PCI0.TRP1.VDID != 0xFFFFFFFF) && \_SB.PCI0.TRP1.HPSX)) { If (\_SB.PCI0.TRP1.PDCX) { \_SB.PCI0.TRP1.PDCX = One \_SB.PCI0.TRP1.HPSX = One If (!\_SB.PCI0.TRP1.PDSX) { \_SB.PCI0.TRP1.L0SE = Zero } Notify (\_SB.PCI0.TRP1, Zero) // Bus Check } Else { \_SB.PCI0.TRP1.HPSX = One } } If (((\_SB.PCI0.TRP2.VDID != 0xFFFFFFFF) && \_SB.PCI0.TRP2.HPSX)) { If (\_SB.PCI0.TRP2.PDCX) { \_SB.PCI0.TRP2.PDCX = One \_SB.PCI0.TRP2.HPSX = One If (!\_SB.PCI0.TRP2.PDSX) { \_SB.PCI0.TRP2.L0SE = Zero } Notify (\_SB.PCI0.TRP2, Zero) // Bus Check } Else { \_SB.PCI0.TRP2.HPSX = One } } If (((\_SB.PCI0.TRP3.VDID != 0xFFFFFFFF) && \_SB.PCI0.TRP3.HPSX)) { If (\_SB.PCI0.TRP3.PDCX) { \_SB.PCI0.TRP3.PDCX = One \_SB.PCI0.TRP3.HPSX = One If (!\_SB.PCI0.TRP3.PDSX) { \_SB.PCI0.TRP3.L0SE = Zero } Notify (\_SB.PCI0.TRP3, Zero) // Bus Check } Else { \_SB.PCI0.TRP3.HPSX = One } } } Method (_L69, 0, Serialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { If (CondRefOf (\_SB.PCI0.TXHC)) { If ((\_SB.PCI0.TRP0.HPME () == One)) { Notify (\_SB.PCI0.TDM0, 0x02) // Device Wake Notify (\_SB.PCI0.TRP0, 0x02) // Device Wake } If ((\_SB.PCI0.TRP1.HPME () == One)) { Notify (\_SB.PCI0.TDM0, 0x02) // Device Wake Notify (\_SB.PCI0.TRP1, 0x02) // Device Wake } If ((\_SB.PCI0.TRP2.HPME () == One)) { Notify (\_SB.PCI0.TDM1, 0x02) // Device Wake Notify (\_SB.PCI0.TRP2, 0x02) // Device Wake } If ((\_SB.PCI0.TRP3.HPME () == One)) { Notify (\_SB.PCI0.TDM1, 0x02) // Device Wake Notify (\_SB.PCI0.TRP3, 0x02) // Device Wake } } \_SB.PCI0.TRP0.HPME () \_SB.PCI0.TRP1.HPME () \_SB.PCI0.TRP2.HPME () \_SB.PCI0.TRP3.HPME () } } Scope (\_SB.PCI0) { Device (IOM) { Name (_HID, "INTC1079") // _HID: Hardware ID Name (_DDN, "Intel(R) Alder Lake Input Output Manager(IOM) driver") // _DDN: DOS Device Name Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0xFBC10000, // Address Base 0x00001600, // Address Length ) }) Name (_STA, 0x0B) // _STA: Status } OperationRegion (TDEN, SystemMemory, (GMHB () + 0x7090), 0x04) Field (TDEN, ByteAcc, NoLock, Preserve) { TRE0, 1, TRE1, 1, TRE2, 1, TRE3, 1, Offset (0x01), THCE, 1, TDCE, 1, DME0, 1, DME1, 1, Offset (0x04) } OperationRegion (MBAR, SystemMemory, (GMHB () + 0x7100), 0x1000) Field (MBAR, ByteAcc, NoLock, Preserve) { Offset (0x10), RBAR, 64 } OperationRegion (PBAR, SystemMemory, (GMHB () + 0x5DA0), 0x08) Field (PBAR, DWordAcc, NoLock, Preserve) { PMBD, 32, PMBC, 8, PSCM, 8, , 15, PMBR, 1 } Method (PMBY, 0, NotSerialized) { Local0 = Zero While ((PMBR && (Local0 < 0x03E8))) { Local0++ Stall (One) } If ((Local0 == 0x03E8)) { Debug = "Timeout occurred." Return (0xFF) } Return (Zero) } Method (IOMA, 0, NotSerialized) { Return ((RBAR & 0xFFFFFFFFFFFFFFFE)) } OperationRegion (IOMR, SystemMemory, (IOMA () + 0x00C10000), 0x0100) Field (IOMR, DWordAcc, NoLock, Preserve) { Offset (0x40), , 15, TD3C, 1, TACK, 1, DPOF, 1, Offset (0x70), IMCD, 32, IMDA, 32 } Method (TG0N, 0, NotSerialized) { If ((^TDM0.VDID == 0xFFFFFFFF)) { Debug = "TDM0 does not exist." } Else { If ((^TDM0.STAT == Zero)) { ^TDM0.D3CX () Debug = "Bring TBT RPs out of D3Code." If ((^TRP0.VDID != 0xFFFFFFFF)) { ^TRP0.D3CX () } If ((^TRP1.VDID != 0xFFFFFFFF)) { ^TRP1.D3CX () } } Else { Debug = "Drop TG0N due to it is already exit D3 cold." } Sleep (0x0A) } } Method (TG0F, 0, NotSerialized) { If ((^TDM0.VDID == 0xFFFFFFFF)) { Debug = "TDM0 does not exist." } ElseIf ((^TDM0.STAT == One)) { ^TDM0.D3CE () If ((^TDM0.IF30 != One)) { Return (Zero) } Debug = "Push TBT RPs to D3Cold together" If ((^TRP0.VDID != 0xFFFFFFFF)) { ^TRP0.D3CE () } If ((^TRP1.VDID != 0xFFFFFFFF)) { ^TRP1.D3CE () } } } Method (TG1N, 0, NotSerialized) { If ((^TDM1.VDID == 0xFFFFFFFF)) { Debug = "TDM1 does not exist." } Else { If ((^TDM1.STAT == Zero)) { ^TDM1.D3CX () Debug = "Bring TBT RPs out of D3Code." If ((^TRP2.VDID != 0xFFFFFFFF)) { ^TRP2.D3CX () } If ((^TRP3.VDID != 0xFFFFFFFF)) { ^TRP3.D3CX () } } Else { Debug = "Drop TG1N due to it is already exit D3 cold." } Sleep (0x0A) } } Method (TG1F, 0, NotSerialized) { If ((^TDM1.VDID == 0xFFFFFFFF)) { Debug = "TDM1 does not exist." } ElseIf ((^TDM1.STAT == One)) { ^TDM1.D3CE () If ((^TDM1.IF30 != One)) { Return (Zero) } Debug = "Push TBT RPs to D3Cold together" If ((^TRP2.VDID != 0xFFFFFFFF)) { ^TRP2.D3CE () } If ((^TRP3.VDID != 0xFFFFFFFF)) { ^TRP3.D3CE () } } } PowerResource (TBT0, 0x05, 0x0001) { Method (_STA, 0, NotSerialized) // _STA: Status { Return (^^TDM0.STAT) /* \_SB_.PCI0.TDM0.STAT */ } Method (_ON, 0, NotSerialized) // _ON_: Power On { TG0N () } Method (_OFF, 0, NotSerialized) // _OFF: Power Off { If ((^^TDM0.SD3C == Zero)) { TG0F () } } } PowerResource (TBT1, 0x05, 0x0001) { Method (_STA, 0, NotSerialized) // _STA: Status { Return (^^TDM1.STAT) /* \_SB_.PCI0.TDM1.STAT */ } Method (_ON, 0, NotSerialized) // _ON_: Power On { TG1N () } Method (_OFF, 0, NotSerialized) // _OFF: Power Off { If ((^^TDM1.SD3C == Zero)) { TG1F () } } } Device (TXHC) { Name (_ADR, 0x000D0000) // _ADR: Address Name (_DDN, "North XHCI controller") // _DDN: DOS Device Name Name (_STR, Unicode ("North XHCI controller")) // _STR: Description String Name (DCPM, 0x04) Method (_STA, 0, NotSerialized) // _STA: Status { If ((THCE == One)) { Return (0x0F) } Else { Return (Zero) } } OperationRegion (XPRT, SystemMemory, BASE (_ADR), 0x0100) Field (XPRT, ByteAcc, NoLock, Preserve) { VDID, 32, Offset (0x74), D0D3, 2, Offset (0x75), PMEE, 1, , 6, PMES, 1 } Method (_PS0, 0, Serialized) // _PS0: Power State 0 { If ((PMEE == One)) { PMEE = Zero } } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { If ((PMEE == Zero)) { PMEE = One } } Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State { Return (0x03) } Name (SD3C, Zero) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Return (Buffer (One) { 0x00 // . }) } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x03) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x03) } Method (_S3W, 0, NotSerialized) // _S3W: S3 Device Wake State { Return (0x03) } Method (_S4W, 0, NotSerialized) // _S4W: S4 Device Wake State { Return (0x03) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x6D, 0x04 }) } Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake { C2PM (Arg0, Arg1, Arg2, DCPM) SD3C = Arg1 } Device (RHUB) { Name (_ADR, Zero) // _ADR: Address Device (HS01) { Name (_ADR, One) // _ADR: Address } Device (SS01) { Name (_ADR, 0x02) // _ADR: Address Method (_DSD, 0, NotSerialized) // _DSD: Device-Specific Data { Return (Package (0x02) { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "usb4-host-interface", TDM0 }, Package (0x02) { "usb4-port-number", Zero } } }) } } Device (SS02) { Name (_ADR, 0x03) // _ADR: Address Method (_DSD, 0, NotSerialized) // _DSD: Device-Specific Data { Return (Package (0x02) { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "usb4-host-interface", TDM0 }, Package (0x02) { "usb4-port-number", One } } }) } } Device (SS03) { Name (_ADR, 0x04) // _ADR: Address Method (_DSD, 0, NotSerialized) // _DSD: Device-Specific Data { Return (Package (0x02) { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "usb4-host-interface", TDM1 }, Package (0x02) { "usb4-port-number", Zero } } }) } } Device (SS04) { Name (_ADR, 0x05) // _ADR: Address Method (_DSD, 0, NotSerialized) // _DSD: Device-Specific Data { Return (Package (0x02) { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "usb4-host-interface", TDM1 }, Package (0x02) { "usb4-port-number", One } } }) } } } } Device (TDM0) { Name (_ADR, 0x000D0002) // _ADR: Address Name (_DDN, "TBT DMA0 controller") // _DDN: DOS Device Name Name (_STR, Unicode ("TBT DMA0 controller")) // _STR: Description String Name (DUID, Zero) Name (DCPM, 0x06) Method (_STA, 0, NotSerialized) // _STA: Status { If ((DME0 == One)) { Return (0x0F) } Else { Return (Zero) } } OperationRegion (DPME, SystemMemory, BASE (_ADR), 0x0100) Field (DPME, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x84), PMST, 2, Offset (0x85), PMEE, 1, , 6, PMES, 1, Offset (0xC8), , 30, IF30, 1, INFR, 1, Offset (0xEC), TB2P, 32, P2TB, 32, Offset (0xFC), DD3E, 1, DFPE, 1, Offset (0xFF), DMAD, 8 } Name (STAT, One) Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State { Return (0x03) } Method (_PR0, 0, NotSerialized) // _PR0: Power Resources for D0 { If ((DUID == Zero)) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (_PR3, 0, NotSerialized) // _PR3: Power Resources for D3hot { If ((DUID == Zero)) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (D3CX, 0, Serialized) { DD3E = Zero STAT = One } Method (D3CE, 0, Serialized) { DD3E = One STAT = Zero } Name (SD3C, Zero) Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake { SD3C = Arg1 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x6D, 0x04 }) } } Device (TDM1) { Name (_ADR, 0x000D0003) // _ADR: Address Name (_DDN, "TBT DMA1 controller") // _DDN: DOS Device Name Name (_STR, Unicode ("TBT DMA1 controller")) // _STR: Description String Name (DUID, One) Name (DCPM, 0x07) Method (_STA, 0, NotSerialized) // _STA: Status { If ((DME1 == One)) { Return (0x0F) } Else { Return (Zero) } } OperationRegion (DPME, SystemMemory, BASE (_ADR), 0x0100) Field (DPME, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x84), PMST, 2, Offset (0x85), PMEE, 1, , 6, PMES, 1, Offset (0xC8), , 30, IF30, 1, INFR, 1, Offset (0xEC), TB2P, 32, P2TB, 32, Offset (0xFC), DD3E, 1, DFPE, 1, Offset (0xFF), DMAD, 8 } Name (STAT, One) Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State { Return (0x03) } Method (_PR0, 0, NotSerialized) // _PR0: Power Resources for D0 { If ((DUID == Zero)) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (_PR3, 0, NotSerialized) // _PR3: Power Resources for D3hot { If ((DUID == Zero)) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (D3CX, 0, Serialized) { DD3E = Zero STAT = One } Method (D3CE, 0, Serialized) { DD3E = One STAT = Zero } Name (SD3C, Zero) Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake { SD3C = Arg1 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x6D, 0x04 }) } } Device (TRP0) { Name (_ADR, 0x00070000) // _ADR: Address Name (TUID, Zero) Name (LTEN, Zero) Name (LMSL, Zero) Name (LNSL, Zero) Name (DCPM, Zero) Method (_STA, 0, NotSerialized) // _STA: Status { If ((TRE0 == One)) { Return (0x0F) } Else { Return (Zero) } } Method (_INI, 0, NotSerialized) // _INI: Initialize { LTEN = Zero LMSL = 0x88C8 LNSL = 0x88C8 } OperationRegion (PXCS, SystemMemory, BASE (_ADR), 0x0800) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x50), L0SE, 1, , 3, LDIS, 1, Offset (0x51), Offset (0x52), , 13, LASX, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), DLSC, 1, Offset (0x60), Offset (0x62), PSPX, 1, Offset (0xA4), D3HT, 2, Offset (0xD8), , 30, HPEX, 1, PMEX, 1, Offset (0xE2), , 2, L23E, 1, L23R, 1, Offset (0x420), , 30, DPGE, 1, Offset (0x5BC), , 3, RPER, 1, RPFE, 1 } Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0xDC), , 30, HPSX, 1, PMSX, 1 } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Return (Buffer (One) { 0x00 // . }) } Name (OPTS, Buffer (0x02) { 0x00, 0x00 // .. }) Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If ((Arg1 >= 0x03)) { If ((Arg2 == Zero)) { CreateBitField (OPTS, 0x09, FUN9) FUN9 = One Return (OPTS) /* \_SB_.PCI0.TRP0.OPTS */ } ElseIf ((Arg2 == 0x09)) { Return (Package (0x05) { 0xC350, One, One, 0xC350, One }) } } } Return (Buffer (One) { 0x00 // . }) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x69, 0x04 }) } } Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake { If (((TUID == Zero) || (TUID == One))) { ^^TDM0.SD3C = Arg1 } Else { ^^TDM1.SD3C = Arg1 } C2PM (Arg0, Arg1, Arg2, DCPM) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x69, 0x04 }) } Method (HPEV, 0, Serialized) { If (((VDID != 0xFFFFFFFF) && HPSX)) { If (((PDCX == One) && (DLSC == One))) { PDCX = One HPSX = One Notify (^, Zero) // Bus Check } Else { HPSX = One } } } Name (STAT, One) Method (D3CX, 0, Serialized) { If ((STAT == One)) { Return (Zero) } RPFE = Zero RPER = Zero L23R = One Local0 = Zero Local1 = L23R /* \_SB_.PCI0.TRP0.L23R */ While (Local1) { If ((Local0 > 0x14)) { Break } Sleep (0x05) Local0++ Local1 = L23R /* \_SB_.PCI0.TRP0.L23R */ } STAT = One } Method (D3CE, 0, Serialized) { If ((STAT == Zero)) { Return (Zero) } L23E = One Local0 = Zero Local1 = L23E /* \_SB_.PCI0.TRP0.L23E */ While (Local1) { If ((Local0 > 0x14)) { Break } Sleep (0x05) Local0++ Local1 = L23E /* \_SB_.PCI0.TRP0.L23E */ } STAT = Zero RPFE = One RPER = One } Method (_PS0, 0, Serialized) // _PS0: Power State 0 { HPEV () If ((HPEX == One)) { HPEX = Zero } HPME () If ((PMEX == One)) { PMEX = Zero } } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { If ((PDCX == One)) { If ((DLSC == Zero)) { PDCX = One } } If ((HPEX == Zero)) { HPEX = One HPEV () } If ((PMEX == Zero)) { PMEX = One HPME () } } Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State { Return (0x03) } Method (_PR0, 0, NotSerialized) // _PR0: Power Resources for D0 { If (((TUID == Zero) || (TUID == One))) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (_PR3, 0, NotSerialized) // _PR3: Power Resources for D3hot { If (((TUID == Zero) || (TUID == One))) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (HPME, 0, Serialized) { If (((VDID != 0xFFFFFFFF) && (PMSX == One))) { Notify (PXSX, 0x02) // Device Wake PMSX = One PSPX = One Return (One) } Return (Zero) } } Device (TRP1) { Name (_ADR, 0x00070001) // _ADR: Address Name (TUID, One) Name (LTEN, Zero) Name (LMSL, Zero) Name (LNSL, Zero) Name (DCPM, One) Method (_STA, 0, NotSerialized) // _STA: Status { If ((TRE1 == One)) { Return (0x0F) } Else { Return (Zero) } } Method (_INI, 0, NotSerialized) // _INI: Initialize { LTEN = Zero LMSL = 0x88C8 LNSL = 0x88C8 } OperationRegion (PXCS, SystemMemory, BASE (_ADR), 0x0800) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x50), L0SE, 1, , 3, LDIS, 1, Offset (0x51), Offset (0x52), , 13, LASX, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), DLSC, 1, Offset (0x60), Offset (0x62), PSPX, 1, Offset (0xA4), D3HT, 2, Offset (0xD8), , 30, HPEX, 1, PMEX, 1, Offset (0xE2), , 2, L23E, 1, L23R, 1, Offset (0x420), , 30, DPGE, 1, Offset (0x5BC), , 3, RPER, 1, RPFE, 1 } Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0xDC), , 30, HPSX, 1, PMSX, 1 } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Return (Buffer (One) { 0x00 // . }) } Name (OPTS, Buffer (0x02) { 0x00, 0x00 // .. }) Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If ((Arg1 >= 0x03)) { If ((Arg2 == Zero)) { CreateBitField (OPTS, 0x09, FUN9) FUN9 = One Return (OPTS) /* \_SB_.PCI0.TRP1.OPTS */ } ElseIf ((Arg2 == 0x09)) { Return (Package (0x05) { 0xC350, One, One, 0xC350, One }) } } } Return (Buffer (One) { 0x00 // . }) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x69, 0x04 }) } } Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake { If (((TUID == Zero) || (TUID == One))) { ^^TDM0.SD3C = Arg1 } Else { ^^TDM1.SD3C = Arg1 } C2PM (Arg0, Arg1, Arg2, DCPM) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x69, 0x04 }) } Method (HPEV, 0, Serialized) { If (((VDID != 0xFFFFFFFF) && HPSX)) { If (((PDCX == One) && (DLSC == One))) { PDCX = One HPSX = One Notify (^, Zero) // Bus Check } Else { HPSX = One } } } Name (STAT, One) Method (D3CX, 0, Serialized) { If ((STAT == One)) { Return (Zero) } RPFE = Zero RPER = Zero L23R = One Local0 = Zero Local1 = L23R /* \_SB_.PCI0.TRP1.L23R */ While (Local1) { If ((Local0 > 0x14)) { Break } Sleep (0x05) Local0++ Local1 = L23R /* \_SB_.PCI0.TRP1.L23R */ } STAT = One } Method (D3CE, 0, Serialized) { If ((STAT == Zero)) { Return (Zero) } L23E = One Local0 = Zero Local1 = L23E /* \_SB_.PCI0.TRP1.L23E */ While (Local1) { If ((Local0 > 0x14)) { Break } Sleep (0x05) Local0++ Local1 = L23E /* \_SB_.PCI0.TRP1.L23E */ } STAT = Zero RPFE = One RPER = One } Method (_PS0, 0, Serialized) // _PS0: Power State 0 { HPEV () If ((HPEX == One)) { HPEX = Zero } HPME () If ((PMEX == One)) { PMEX = Zero } } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { If ((PDCX == One)) { If ((DLSC == Zero)) { PDCX = One } } If ((HPEX == Zero)) { HPEX = One HPEV () } If ((PMEX == Zero)) { PMEX = One HPME () } } Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State { Return (0x03) } Method (_PR0, 0, NotSerialized) // _PR0: Power Resources for D0 { If (((TUID == Zero) || (TUID == One))) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (_PR3, 0, NotSerialized) // _PR3: Power Resources for D3hot { If (((TUID == Zero) || (TUID == One))) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (HPME, 0, Serialized) { If (((VDID != 0xFFFFFFFF) && (PMSX == One))) { Notify (PXSX, 0x02) // Device Wake PMSX = One PSPX = One Return (One) } Return (Zero) } } Device (TRP2) { Name (_ADR, 0x00070002) // _ADR: Address Name (TUID, 0x02) Name (LTEN, Zero) Name (LMSL, Zero) Name (LNSL, Zero) Name (DCPM, 0x02) Method (_STA, 0, NotSerialized) // _STA: Status { If ((TRE2 == One)) { Return (0x0F) } Else { Return (Zero) } } Method (_INI, 0, NotSerialized) // _INI: Initialize { LTEN = Zero LMSL = 0x88C8 LNSL = 0x88C8 } OperationRegion (PXCS, SystemMemory, BASE (_ADR), 0x0800) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x50), L0SE, 1, , 3, LDIS, 1, Offset (0x51), Offset (0x52), , 13, LASX, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), DLSC, 1, Offset (0x60), Offset (0x62), PSPX, 1, Offset (0xA4), D3HT, 2, Offset (0xD8), , 30, HPEX, 1, PMEX, 1, Offset (0xE2), , 2, L23E, 1, L23R, 1, Offset (0x420), , 30, DPGE, 1, Offset (0x5BC), , 3, RPER, 1, RPFE, 1 } Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0xDC), , 30, HPSX, 1, PMSX, 1 } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Return (Buffer (One) { 0x00 // . }) } Name (OPTS, Buffer (0x02) { 0x00, 0x00 // .. }) Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If ((Arg1 >= 0x03)) { If ((Arg2 == Zero)) { CreateBitField (OPTS, 0x09, FUN9) FUN9 = One Return (OPTS) /* \_SB_.PCI0.TRP2.OPTS */ } ElseIf ((Arg2 == 0x09)) { Return (Package (0x05) { 0xC350, One, One, 0xC350, One }) } } } Return (Buffer (One) { 0x00 // . }) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x69, 0x04 }) } } Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake { If (((TUID == Zero) || (TUID == One))) { ^^TDM0.SD3C = Arg1 } Else { ^^TDM1.SD3C = Arg1 } C2PM (Arg0, Arg1, Arg2, DCPM) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x69, 0x04 }) } Method (HPEV, 0, Serialized) { If (((VDID != 0xFFFFFFFF) && HPSX)) { If (((PDCX == One) && (DLSC == One))) { PDCX = One HPSX = One Notify (^, Zero) // Bus Check } Else { HPSX = One } } } Name (STAT, One) Method (D3CX, 0, Serialized) { If ((STAT == One)) { Return (Zero) } RPFE = Zero RPER = Zero L23R = One Local0 = Zero Local1 = L23R /* \_SB_.PCI0.TRP2.L23R */ While (Local1) { If ((Local0 > 0x14)) { Break } Sleep (0x05) Local0++ Local1 = L23R /* \_SB_.PCI0.TRP2.L23R */ } STAT = One } Method (D3CE, 0, Serialized) { If ((STAT == Zero)) { Return (Zero) } L23E = One Local0 = Zero Local1 = L23E /* \_SB_.PCI0.TRP2.L23E */ While (Local1) { If ((Local0 > 0x14)) { Break } Sleep (0x05) Local0++ Local1 = L23E /* \_SB_.PCI0.TRP2.L23E */ } STAT = Zero RPFE = One RPER = One } Method (_PS0, 0, Serialized) // _PS0: Power State 0 { HPEV () If ((HPEX == One)) { HPEX = Zero } HPME () If ((PMEX == One)) { PMEX = Zero } } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { If ((PDCX == One)) { If ((DLSC == Zero)) { PDCX = One } } If ((HPEX == Zero)) { HPEX = One HPEV () } If ((PMEX == Zero)) { PMEX = One HPME () } } Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State { Return (0x03) } Method (_PR0, 0, NotSerialized) // _PR0: Power Resources for D0 { If (((TUID == Zero) || (TUID == One))) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (_PR3, 0, NotSerialized) // _PR3: Power Resources for D3hot { If (((TUID == Zero) || (TUID == One))) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (HPME, 0, Serialized) { If (((VDID != 0xFFFFFFFF) && (PMSX == One))) { Notify (PXSX, 0x02) // Device Wake PMSX = One PSPX = One Return (One) } Return (Zero) } } Device (TRP3) { Name (_ADR, 0x00070003) // _ADR: Address Name (TUID, 0x03) Name (LTEN, Zero) Name (LMSL, Zero) Name (LNSL, Zero) Name (DCPM, 0x03) Method (_STA, 0, NotSerialized) // _STA: Status { If ((TRE3 == One)) { Return (0x0F) } Else { Return (Zero) } } Method (_INI, 0, NotSerialized) // _INI: Initialize { LTEN = Zero LMSL = 0x88C8 LNSL = 0x88C8 } OperationRegion (PXCS, SystemMemory, BASE (_ADR), 0x0800) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x50), L0SE, 1, , 3, LDIS, 1, Offset (0x51), Offset (0x52), , 13, LASX, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), DLSC, 1, Offset (0x60), Offset (0x62), PSPX, 1, Offset (0xA4), D3HT, 2, Offset (0xD8), , 30, HPEX, 1, PMEX, 1, Offset (0xE2), , 2, L23E, 1, L23R, 1, Offset (0x420), , 30, DPGE, 1, Offset (0x5BC), , 3, RPER, 1, RPFE, 1 } Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0xDC), , 30, HPSX, 1, PMSX, 1 } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Return (Buffer (One) { 0x00 // . }) } Name (OPTS, Buffer (0x02) { 0x00, 0x00 // .. }) Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If ((Arg1 >= 0x03)) { If ((Arg2 == Zero)) { CreateBitField (OPTS, 0x09, FUN9) FUN9 = One Return (OPTS) /* \_SB_.PCI0.TRP3.OPTS */ } ElseIf ((Arg2 == 0x09)) { Return (Package (0x05) { 0xC350, One, One, 0xC350, One }) } } } Return (Buffer (One) { 0x00 // . }) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x69, 0x04 }) } } Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake { If (((TUID == Zero) || (TUID == One))) { ^^TDM0.SD3C = Arg1 } Else { ^^TDM1.SD3C = Arg1 } C2PM (Arg0, Arg1, Arg2, DCPM) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x69, 0x04 }) } Method (HPEV, 0, Serialized) { If (((VDID != 0xFFFFFFFF) && HPSX)) { If (((PDCX == One) && (DLSC == One))) { PDCX = One HPSX = One Notify (^, Zero) // Bus Check } Else { HPSX = One } } } Name (STAT, One) Method (D3CX, 0, Serialized) { If ((STAT == One)) { Return (Zero) } RPFE = Zero RPER = Zero L23R = One Local0 = Zero Local1 = L23R /* \_SB_.PCI0.TRP3.L23R */ While (Local1) { If ((Local0 > 0x14)) { Break } Sleep (0x05) Local0++ Local1 = L23R /* \_SB_.PCI0.TRP3.L23R */ } STAT = One } Method (D3CE, 0, Serialized) { If ((STAT == Zero)) { Return (Zero) } L23E = One Local0 = Zero Local1 = L23E /* \_SB_.PCI0.TRP3.L23E */ While (Local1) { If ((Local0 > 0x14)) { Break } Sleep (0x05) Local0++ Local1 = L23E /* \_SB_.PCI0.TRP3.L23E */ } STAT = Zero RPFE = One RPER = One } Method (_PS0, 0, Serialized) // _PS0: Power State 0 { HPEV () If ((HPEX == One)) { HPEX = Zero } HPME () If ((PMEX == One)) { PMEX = Zero } } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { If ((PDCX == One)) { If ((DLSC == Zero)) { PDCX = One } } If ((HPEX == Zero)) { HPEX = One HPEV () } If ((PMEX == Zero)) { PMEX = One HPME () } } Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State { Return (0x03) } Method (_PR0, 0, NotSerialized) // _PR0: Power Resources for D0 { If (((TUID == Zero) || (TUID == One))) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (_PR3, 0, NotSerialized) // _PR3: Power Resources for D3hot { If (((TUID == Zero) || (TUID == One))) { Return (Package (0x01) { TBT0 }) } Else { Return (Package (0x01) { TBT1 }) } } Method (HPME, 0, Serialized) { If (((VDID != 0xFFFFFFFF) && (PMSX == One))) { Notify (PXSX, 0x02) // Device Wake PMSX = One PSPX = One Return (One) } Return (Zero) } } } Scope (GFX0) { OperationRegion (GFXC, PCI_Config, Zero, 0x0100) Field (GFXC, DWordAcc, NoLock, Preserve) { Offset (0x10), BAR0, 64, Offset (0xE4), ASLE, 32, Offset (0xFC), ASLS, 32 } OperationRegion (GFRG, SystemMemory, (BAR0 & 0xFFFFFFFFFFFFFFF0), 0x00400000) Field (GFRG, DWordAcc, NoLock, Preserve) { Offset (0xC8258), BCLV, 32 } Field (GFRG, DWordAcc, NoLock, Preserve) { Offset (0xC8254), BCLM, 32 } Device (BOX3) { Name (_ADR, Zero) // _ADR: Address OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) Field (OPRG, DWordAcc, NoLock, Preserve) { Offset (0x58), MBOX, 32, Offset (0x300), ARDY, 1, Offset (0x304), ASLC, 32, TCHE, 32, ALSI, 32, BCLP, 32, PFIT, 32, CBLV, 32 } Method (XBCM, 1, Serialized) { If ((ASLS == Zero)) { Return (Ones) } If (((MBOX & 0x04) == Zero)) { Return (Ones) } Local1 = ((Arg0 * 0xFF) / 0x64) If ((Local1 > 0xFF)) { Local1 = 0xFF } BCLP = (Local1 | 0x80000000) If ((ARDY == Zero)) { Return (Ones) } ASLC = 0x02 ASLE = One Local0 = 0x20 While ((Local0 > Zero)) { Sleep (One) If (((ASLC & 0x02) == Zero)) { Local1 = ((ASLC >> 0x0C) & 0x03) If ((Local1 == Zero)) { Return (Zero) } Else { Return (Ones) } } Local0-- } Return (Ones) } } Device (LEGA) { Name (_ADR, Zero) // _ADR: Address Method (DRCL, 2, NotSerialized) { Return (((Arg0 + (Arg1 / 0x02)) / Arg1)) } Method (XBCM, 1, NotSerialized) { BCLV = DRCL ((Arg0 * BCLM), 0x64) } Method (XBQC, 0, NotSerialized) { If ((BCLM == Zero)) { Return (Zero) } Local0 = DRCL ((BCLV * 0x64), BCLM) Local1 = 0x02 While ((Local1 < (SizeOf (BRIG) - One))) { Local2 = DerefOf (BRIG [Local1]) Local3 = DerefOf (BRIG [(Local1 + One)]) If ((Local0 < Local3)) { If (((Local0 < Local2) || ((Local0 - Local2) < (Local3 - Local0)))) { Return (Local2) } Else { Return (Local3) } } Local1++ } Return (Local3) } } Method (XBCM, 1, NotSerialized) { If ((^BOX3.XBCM (Arg0) == Ones)) { ^LEGA.XBCM (Arg0) } } Method (XBQC, 0, NotSerialized) { Return (^LEGA.XBQC ()) } Name (BRCT, Zero) Method (BRID, 1, NotSerialized) { Local0 = Match (BRIG, MEQ, Arg0, MTR, Zero, 0x02) If ((Local0 == Ones)) { Return ((SizeOf (BRIG) - One)) } Return (Local0) } Method (XBCL, 0, NotSerialized) { BRCT = One Return (BRIG) /* \_SB_.PCI0.GFX0.BRIG */ } Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching { } Method (DECB, 0, NotSerialized) { If (BRCT) { Notify (LCD0, 0x87) // Device-Specific } Else { Local0 = BRID (XBQC ()) If ((Local0 != 0x02)) { Local0-- } XBCM (DerefOf (BRIG [Local0])) } } Method (INCB, 0, NotSerialized) { If (BRCT) { Notify (LCD0, 0x86) // Device-Specific } Else { Local0 = BRID (XBQC ()) If ((Local0 != (SizeOf (BRIG) - One))) { Local0++ } XBCM (DerefOf (BRIG [Local0])) } } } Scope (GFX0) { Name (BRIG, Package (0x12) { 0x64, 0x64, 0x02, 0x04, 0x05, 0x07, 0x09, 0x0B, 0x0D, 0x12, 0x14, 0x18, 0x1D, 0x21, 0x28, 0x32, 0x43, 0x64 }) } Device (GNA) { Name (_ADR, 0x00080000) // _ADR: Address Name (_DDN, "GNA Scoring Accelerator") // _DDN: DOS Device Name } Device (PS2K) { Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID Name (_CID, EisaId ("PNP030B")) // _CID: Compatible ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0060, // Range Minimum 0x0060, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0064, // Range Minimum 0x0064, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQ (Edge, ActiveHigh, Exclusive, ) {1} }) Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } } Device (PS2M) { Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _CID: Compatible ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IRQ (Edge, ActiveHigh, Exclusive, ) {12} }) Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } } } Name (SSFG, 0x0D) If (One) { SSFG &= 0xFE } If (Zero) { SSFG &= 0xF7 } If (CondRefOf (\OSFG)) { SSFG = OSFG /* External reference */ } Name (_S0, Package (0x04) // _S0_: S0 System State { Zero, Zero, Zero, Zero }) If ((SSFG & One)) { Name (_S1, Package (0x04) // _S1_: S1 System State { One, Zero, Zero, Zero }) } If ((SSFG & 0x04)) { Name (_S3, Package (0x04) // _S3_: S3 System State { 0x05, Zero, Zero, Zero }) } If ((SSFG & 0x08)) { Name (_S4, Package (0x04) // _S4_: S4 System State { 0x06, 0x04, Zero, Zero }) } Name (_S5, Package (0x04) // _S5_: S5 System State { 0x07, Zero, Zero, Zero }) Scope (_SB.PCI0.LPCB) { OperationRegion (CMS2, SystemIO, 0x72, 0x02) Field (CMS2, ByteAcc, NoLock, Preserve) { IND2, 8, DAT2, 8 } IndexField (IND2, DAT2, ByteAcc, NoLock, Preserve) { Offset (0x80), FLKC, 8, TPLC, 8, KLBC, 8, KLSC, 8 } Device (EC) { Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (_GPE, 0x6E) // _GPE: General Purpose Events Name (ECAV, Zero) Name (ECTK, One) Name (B2ST, Zero) Name (CFAN, Zero) Name (CMDR, Zero) Name (DOCK, Zero) Name (PLMX, Zero) Name (PECH, Zero) Name (PECL, Zero) Name (PENV, Zero) Name (PINV, Zero) Name (PPSH, Zero) Name (PPSL, Zero) Name (PSTP, Zero) Name (RPWR, Zero) Name (VPWR, Zero) Name (WTMS, Zero) Name (AWT2, Zero) Name (AWT1, Zero) Name (AWT0, Zero) Name (DLED, Zero) Name (SPT2, Zero) Name (PB10, Zero) Name (IWCW, Zero) Name (IWCR, Zero) Name (PVOL, Zero) Mutex (ECMT, 0x00) Name (BFFR, ResourceTemplate () { IO (Decode16, 0x0062, // Range Minimum 0x0062, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0066, // Range Minimum 0x0066, // Range Maximum 0x00, // Alignment 0x01, // Length ) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Return (BFFR) /* \_SB_.PCI0.LPCB.EC__.BFFR */ } Method (_STA, 0, NotSerialized) // _STA: Status { LIDS = 0x03 Return (0x0F) } OperationRegion (SIPR, SystemIO, 0xB2, One) Field (SIPR, ByteAcc, Lock, Preserve) { SMB2, 8 } OperationRegion (ECF2, EmbeddedControl, Zero, 0x0100) Field (ECF2, ByteAcc, Lock, Preserve) { Offset (0x00), ECMV, 8, ECSV, 8, Offset (0x04), OSFG, 8, FRMF, 8, Offset (0x09), KLBE, 8, KLSE, 8, Offset (0x0C), TPLE, 8, Offset (0x0F), FLKE, 8, KLTE, 8, Offset (0x17), FCLA, 8, Offset (0x1A), BFCP, 8, FANM, 8, Offset (0x40), SHIP, 8, Offset (0x7F), LSTE, 1, Offset (0x80), Offset (0x80), ECPS, 8, B1MN, 8, B1SN, 16, B1DC, 16, B1DV, 16, B1FC, 16, B1TP, 16, B1ST, 8, B1PR, 16, B1RC, 16, B1PV, 16, B1RP, 16, B1CC, 16 } Method (ECRD, 1, Serialized) { If (ECTK) { If ((_REV >= 0x02)) { ECAV = One } ECTK = Zero } Local0 = Acquire (ECMT, 0x03E8) If ((Local0 == Zero)) { If (ECAV) { Local1 = DerefOf (Arg0) Release (ECMT) Return (Local1) } Else { Release (ECMT) } } Return (Zero) } Method (ECWR, 2, Serialized) { Local0 = Acquire (ECMT, 0x03E8) If ((Local0 == Zero)) { If (ECAV) { Arg1 = Arg0 Local1 = Zero While (One) { If ((Arg0 == DerefOf (Arg1))) { Break } Sleep (One) Arg1 = Arg0 Local1 += One If ((Local1 == 0x03)) { Break } } } Release (ECMT) } } Device (ADP1) { Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: Hardware ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_PSR, 0, NotSerialized) // _PSR: Power Source { PWRS = (ECRD (RefOf (ECPS)) & One) Return (PWRS) /* \PWRS */ } Method (_PCL, 0, NotSerialized) // _PCL: Power Consumer List { Return (Package (0x01) { _SB }) } } Device (BAT0) { Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { If ((ECPS & 0x02)) { Return (0x1F) } Return (0x0F) } Name (SBIF, Package (0x0D) { One, 0xFFFFFFFF, 0xFFFFFFFF, One, 0xFFFFFFFF, Zero, Zero, 0xFFFFFFFF, 0xFFFFFFFF, "AEC3756153-2S1P-N", "Unknown", "LION", "Apower Electronics" }) Method (_BIF, 0, NotSerialized) // _BIF: Battery Information { If (B1DC) { SBIF [One] = B1DC /* \_SB_.PCI0.LPCB.EC__.B1DC */ If ((B1FC != 0xFFFF)) { SBIF [0x02] = B1FC /* \_SB_.PCI0.LPCB.EC__.B1FC */ } Else { SBIF [0x02] = B1DC /* \_SB_.PCI0.LPCB.EC__.B1DC */ } SBIF [0x04] = B1DV /* \_SB_.PCI0.LPCB.EC__.B1DV */ SBIF [0x05] = (B1DC / 0x05) SBIF [0x06] = (B1DC / 0x14) SBIF [0x07] = (B1DC / 0x01F4) SBIF [0x08] = (B1DC / 0x01F4) } Return (SBIF) /* \_SB_.PCI0.LPCB.EC__.BAT0.SBIF */ } Name (XBIF, Package (0x15) { One, One, 0xFFFFFFFF, 0xFFFFFFFF, One, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x02, 0x1388, 0x03E8, 0x1388, 0x03E8, 0xFFFFFFFF, 0xFFFFFFFF, "AEC3756153-2S1P-N", "Unknown", "LION", "Apower Electronics", One }) Method (_BIX, 0, NotSerialized) // _BIX: Battery Information Extended { If (B1DC) { XBIF [0x02] = B1DC /* \_SB_.PCI0.LPCB.EC__.B1DC */ If ((B1FC != 0xFFFF)) { XBIF [0x03] = B1FC /* \_SB_.PCI0.LPCB.EC__.B1FC */ } Else { XBIF [0x03] = B1DC /* \_SB_.PCI0.LPCB.EC__.B1DC */ } XBIF [0x05] = B1DV /* \_SB_.PCI0.LPCB.EC__.B1DV */ XBIF [0x06] = (B1DC / 0x05) XBIF [0x07] = (B1DC / 0x14) If ((B1CC != 0xFFFF)) { XBIF [0x08] = B1CC /* \_SB_.PCI0.LPCB.EC__.B1CC */ } XBIF [0x0E] = (B1DC / 0x01F4) XBIF [0x0F] = (B1DC / 0x01F4) } Return (XBIF) /* \_SB_.PCI0.LPCB.EC__.BAT0.XBIF */ } Name (PKG1, Package (0x04) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Method (_BST, 0, NotSerialized) // _BST: Battery Status { PKG1 [Zero] = (B1ST & 0x07) PKG1 [One] = B1PR /* \_SB_.PCI0.LPCB.EC__.B1PR */ If ((B1RC != 0xFFFF)) { PKG1 [0x02] = B1RC /* \_SB_.PCI0.LPCB.EC__.B1RC */ } Else { PKG1 [0x02] = (B1RP * (B1DC / 0x64)) } PKG1 [0x03] = B1PV /* \_SB_.PCI0.LPCB.EC__.B1PV */ Return (PKG1) /* \_SB_.PCI0.LPCB.EC__.BAT0.PKG1 */ } Method (_PCL, 0, NotSerialized) // _PCL: Power Consumer List { Return (Package (0x01) { _SB }) } } Method (_Q05, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { ^^^^HIDD.HPEM (0x14) } Method (_Q06, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { ^^^^HIDD.HPEM (0x13) } Method (_Q0A, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { Notify (ADP1, 0x80) // Status Change } Method (_Q0B, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { Notify (BAT0, 0x80) // Status Change } Method (_Q0C, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { LIDS = LSTE /* \_SB_.PCI0.LPCB.EC__.LSTE */ Notify (LID0, 0x80) // Status Change } Device (LID0) { Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_LID, 0, NotSerialized) // _LID: Lid Status { Return (ECRD (RefOf (LSTE))) } } Method (_REG, 2, NotSerialized) // _REG: Region Availability { If (((Arg0 == 0x03) && (Arg1 == One))) { ECAV = One LIDS = LSTE /* \_SB_.PCI0.LPCB.EC__.LSTE */ OSFG = One PWRS = (ECRD (RefOf (ECPS)) & One) PNOT () } } } } Scope (_SB) { Device (HIDD) { Name (_HID, "INTC1051") // _HID: Hardware ID Name (HBSY, Zero) Name (HIDX, Zero) Name (HMDE, Zero) Name (HRDY, Zero) Name (BTLD, Zero) Name (BTS1, Zero) Method (_STA, 0, Serialized) // _STA: Status { Return (0x0F) } Name (DPKG, Package (0x04) { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }) Method (HDDM, 0, Serialized) { Return (DPKG) /* \_SB_.HIDD.DPKG */ } Method (HDEM, 0, Serialized) { HBSY = Zero If ((HMDE == Zero)) { Return (HIDX) /* \_SB_.HIDD.HIDX */ } Return (HMDE) /* \_SB_.HIDD.HMDE */ } Method (HDMM, 0, Serialized) { Return (HMDE) /* \_SB_.HIDD.HMDE */ } Method (HDSM, 1, Serialized) { HRDY = Arg0 } Method (HPEM, 1, Serialized) { HBSY = One If ((HMDE == Zero)) { HIDX = Arg0 } Else { HIDX = Arg0 } Notify (HIDD, 0xC0) // Hardware-Specific Local0 = Zero While (((Local0 < 0xFA) && HBSY)) { Sleep (0x04) Local0++ } If ((HBSY == One)) { HBSY = Zero HIDX = Zero Return (One) } Else { Return (Zero) } } Method (BTNL, 0, Serialized) { BTS1 = Zero } Method (BTNE, 1, Serialized) { Return (BTS1) /* \_SB_.HIDD.BTS1 */ } Method (BTNS, 0, Serialized) { Return (BTS1) /* \_SB_.HIDD.BTS1 */ } Method (BTNC, 0, Serialized) { Return (0x1F) } Name (HEB2, Zero) Method (HEBC, 0, Serialized) { Return (Zero) } Method (H2BC, 0, Serialized) { Return (Zero) } Method (HEEC, 0, Serialized) { Return (Zero) } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("eeec56b3-4442-408f-a792-4edd4d758054") /* Unknown UUID */)) { If ((One == ToInteger (Arg1))) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (0x02) { 0xFF, 0x03 // .. }) } Case (One) { BTNL () } Case (0x02) { Return (HDMM ()) } Case (0x03) { HDSM (DerefOf (Arg3 [Zero])) } Case (0x04) { Return (HDEM ()) } Case (0x05) { Return (BTNS ()) } Case (0x06) { BTNE (DerefOf (Arg3 [Zero])) } Case (0x07) { Return (HEBC ()) } Case (0x08) { Return (Zero) } Case (0x09) { Return (H2BC ()) } } } } Return (Buffer (One) { 0x00 // . }) } } Method (RPTS, 1, Serialized) { Switch (ToInteger (^PCI0.LPCB.EC.ECRD (RefOf (^PCI0.LPCB.EC.TPLE)))) { Case (Zero) { ^PCI0.LPCB.TPLC = Zero } Case (0x11) { ^PCI0.LPCB.TPLC = Zero } Case (0x22) { ^PCI0.LPCB.TPLC = One } } ^PCI0.LPCB.FLKC = ^PCI0.LPCB.EC.ECRD (RefOf (^PCI0.LPCB.EC.FLKE)) Switch (ToInteger (^PCI0.LPCB.EC.ECRD (RefOf (^PCI0.LPCB.EC.KLSE)))) { Case (Zero) { ^PCI0.LPCB.KLSC = Zero } Case (0xDD) { ^PCI0.LPCB.KLSC = One } } Switch (ToInteger (^PCI0.LPCB.EC.ECRD (RefOf (^PCI0.LPCB.EC.KLBE)))) { Case (0xDD) { ^PCI0.LPCB.KLBC = Zero } Case (0xCC) { ^PCI0.LPCB.KLBC = One } Case (0xBB) { ^PCI0.LPCB.KLBC = 0x02 } Case (0xAA) { ^PCI0.LPCB.KLBC = 0x03 } } ^PCI0.LPCB.EC.OSFG = Zero } Method (RWAK, 1, Serialized) { ^PCI0.LPCB.EC.OSFG = One Switch (ToInteger (^PCI0.LPCB.TPLC)) { Case (Zero) { ^PCI0.LPCB.EC.ECWR (Zero, RefOf (^PCI0.LPCB.EC.TPLE)) } Case (One) { ^PCI0.LPCB.EC.ECWR (0x22, RefOf (^PCI0.LPCB.EC.TPLE)) } } ^PCI0.LPCB.EC.ECWR (^PCI0.LPCB.FLKC, RefOf (^PCI0.LPCB.EC.FLKE)) Switch (ToInteger (^PCI0.LPCB.KLSC)) { Case (Zero) { ^PCI0.LPCB.EC.ECWR (Zero, RefOf (^PCI0.LPCB.EC.KLSE)) } Case (One) { ^PCI0.LPCB.EC.ECWR (0xDD, RefOf (^PCI0.LPCB.EC.KLSE)) } } Switch (ToInteger (^PCI0.LPCB.KLBC)) { Case (Zero) { ^PCI0.LPCB.EC.ECWR (0xDD, RefOf (^PCI0.LPCB.EC.KLBE)) } Case (One) { ^PCI0.LPCB.EC.ECWR (0xCC, RefOf (^PCI0.LPCB.EC.KLBE)) } Case (0x02) { ^PCI0.LPCB.EC.ECWR (0xBB, RefOf (^PCI0.LPCB.EC.KLBE)) } Case (0x03) { ^PCI0.LPCB.EC.ECWR (0xAA, RefOf (^PCI0.LPCB.EC.KLBE)) } } } } Scope (_SB) { Method (MPTS, 1, NotSerialized) { RPTS (Arg0) } Method (MWAK, 1, NotSerialized) { RWAK (Arg0) } } } FACP ---- [000h 0000 004h] Signature : "FACP" [Fixed ACPI Description Table (FADT)] [004h 0004 004h] Table Length : 00000114 [008h 0008 001h] Revision : 06 [009h 0009 001h] Checksum : C6 [00Ah 0010 006h] Oem ID : "COREv4" [010h 0016 008h] Oem Table ID : "COREBOOT" [018h 0024 004h] Oem Revision : 00000000 [01Ch 0028 004h] Asl Compiler ID : "CORE" [020h 0032 004h] Asl Compiler Revision : 20230628 [024h 0036 004h] FACS Address : 7687B240 [028h 0040 004h] DSDT Address : 76859000 [02Ch 0044 001h] Model : 00 [02Dh 0045 001h] PM Profile : 08 [Tablet] [02Eh 0046 002h] SCI Interrupt : 0009 [030h 0048 004h] SMI Command Port : 000000B2 [034h 0052 001h] ACPI Enable Value : E1 [035h 0053 001h] ACPI Disable Value : 1E [036h 0054 001h] S4BIOS Command : 00 [037h 0055 001h] P-State Control : 00 [038h 0056 004h] PM1A Event Block Address : 00001800 [03Ch 0060 004h] PM1B Event Block Address : 00000000 [040h 0064 004h] PM1A Control Block Address : 00001804 [044h 0068 004h] PM1B Control Block Address : 00000000 [048h 0072 004h] PM2 Control Block Address : 00000000 [04Ch 0076 004h] PM Timer Block Address : 00001808 [050h 0080 004h] GPE0 Block Address : 00001860 [054h 0084 004h] GPE1 Block Address : 00000000 [058h 0088 001h] PM1 Event Block Length : 04 [059h 0089 001h] PM1 Control Block Length : 02 [05Ah 0090 001h] PM2 Control Block Length : 00 [05Bh 0091 001h] PM Timer Block Length : 04 [05Ch 0092 001h] GPE0 Block Length : 20 [05Dh 0093 001h] GPE1 Block Length : 00 [05Eh 0094 001h] GPE1 Base Offset : 00 [05Fh 0095 001h] _CST Support : 00 [060h 0096 002h] C2 Latency : 0065 [062h 0098 002h] C3 Latency : 03E9 [064h 0100 002h] CPU Cache Size : 0000 [066h 0102 002h] Cache Flush Stride : 0000 [068h 0104 001h] Duty Cycle Offset : 00 [069h 0105 001h] Duty Cycle Width : 00 [06Ah 0106 001h] RTC Day Alarm Index : 0D [06Bh 0107 001h] RTC Month Alarm Index : 00 [06Ch 0108 001h] RTC Century Index : 32 [06Dh 0109 002h] Boot Flags (decoded below) : 0000 Legacy Devices Supported (V2) : 0 8042 Present on ports 60/64 (V2) : 0 VGA Not Present (V4) : 0 MSI Not Supported (V4) : 0 PCIe ASPM Not Supported (V4) : 0 CMOS RTC Not Present (V5) : 0 [06Fh 0111 001h] Reserved : 00 [070h 0112 004h] Flags (decoded below) : 00000CA5 WBINVD instruction is operational (V1) : 1 WBINVD flushes all caches (V1) : 0 All CPUs support C1 (V1) : 1 C2 works on MP system (V1) : 0 Control Method Power Button (V1) : 0 Control Method Sleep Button (V1) : 1 RTC wake not in fixed reg space (V1) : 0 RTC can wake system from S4 (V1) : 1 32-bit PM Timer (V1) : 0 Docking Supported (V1) : 0 Reset Register Supported (V2) : 1 Sealed Case (V3) : 1 Headless - No Video (V3) : 0 Use native instr after SLP_TYPx (V3) : 0 PCIEXP_WAK Bits Supported (V4) : 0 Use Platform Timer (V4) : 0 RTC_STS valid on S4 wake (V4) : 0 Remote Power-on capable (V4) : 0 Use APIC Cluster Model (V4) : 0 Use APIC Physical Destination Mode (V4) : 0 Hardware Reduced (V5) : 0 Low Power S0 Idle (V5) : 0 [074h 0116 00Ch] Reset Register : [Generic Address Structure] [074h 0116 001h] Space ID : 01 [SystemIO] [075h 0117 001h] Bit Width : 08 [076h 0118 001h] Bit Offset : 00 [077h 0119 001h] Encoded Access Width : 01 [Byte Access:8] [078h 0120 008h] Address : 0000000000000CF9 [080h 0128 001h] Value to cause reset : 06 [081h 0129 002h] ARM Flags (decoded below) : 0000 PSCI Compliant : 0 Must use HVC for PSCI : 0 [083h 0131 001h] FADT Minor Revision : 00 [084h 0132 008h] FACS Address : 0000000000000000 [08Ch 0140 008h] DSDT Address : 0000000076859000 [094h 0148 00Ch] PM1A Event Block : [Generic Address Structure] [094h 0148 001h] Space ID : 01 [SystemIO] [095h 0149 001h] Bit Width : 20 [096h 0150 001h] Bit Offset : 00 [097h 0151 001h] Encoded Access Width : 02 [Word Access:16] [098h 0152 008h] Address : 0000000000001800 [0A0h 0160 00Ch] PM1B Event Block : [Generic Address Structure] [0A0h 0160 001h] Space ID : 00 [SystemMemory] [0A1h 0161 001h] Bit Width : 00 [0A2h 0162 001h] Bit Offset : 00 [0A3h 0163 001h] Encoded Access Width : 00 [Undefined/Legacy] [0A4h 0164 008h] Address : 0000000000000000 [0ACh 0172 00Ch] PM1A Control Block : [Generic Address Structure] [0ACh 0172 001h] Space ID : 01 [SystemIO] [0ADh 0173 001h] Bit Width : 10 [0AEh 0174 001h] Bit Offset : 00 [0AFh 0175 001h] Encoded Access Width : 02 [Word Access:16] [0B0h 0176 008h] Address : 0000000000001804 [0B8h 0184 00Ch] PM1B Control Block : [Generic Address Structure] [0B8h 0184 001h] Space ID : 00 [SystemMemory] [0B9h 0185 001h] Bit Width : 00 [0BAh 0186 001h] Bit Offset : 00 [0BBh 0187 001h] Encoded Access Width : 00 [Undefined/Legacy] [0BCh 0188 008h] Address : 0000000000000000 [0C4h 0196 00Ch] PM2 Control Block : [Generic Address Structure] [0C4h 0196 001h] Space ID : 00 [SystemMemory] [0C5h 0197 001h] Bit Width : 00 [0C6h 0198 001h] Bit Offset : 00 [0C7h 0199 001h] Encoded Access Width : 00 [Undefined/Legacy] [0C8h 0200 008h] Address : 0000000000000000 [0D0h 0208 00Ch] PM Timer Block : [Generic Address Structure] [0D0h 0208 001h] Space ID : 01 [SystemIO] [0D1h 0209 001h] Bit Width : 20 [0D2h 0210 001h] Bit Offset : 00 [0D3h 0211 001h] Encoded Access Width : 03 [DWord Access:32] [0D4h 0212 008h] Address : 0000000000001808 [0DCh 0220 00Ch] GPE0 Block : [Generic Address Structure] [0DCh 0220 001h] Space ID : 01 [SystemIO] [0DDh 0221 001h] Bit Width : 00 [0DEh 0222 001h] Bit Offset : 00 [0DFh 0223 001h] Encoded Access Width : 01 [Byte Access:8] [0E0h 0224 008h] Address : 0000000000001860 [0E8h 0232 00Ch] GPE1 Block : [Generic Address Structure] [0E8h 0232 001h] Space ID : 00 [SystemMemory] [0E9h 0233 001h] Bit Width : 00 [0EAh 0234 001h] Bit Offset : 00 [0EBh 0235 001h] Encoded Access Width : 00 [Undefined/Legacy] [0ECh 0236 008h] Address : 0000000000000000 [0F4h 0244 00Ch] Sleep Control Register : [Generic Address Structure] [0F4h 0244 001h] Space ID : 00 [SystemMemory] [0F5h 0245 001h] Bit Width : 00 [0F6h 0246 001h] Bit Offset : 00 [0F7h 0247 001h] Encoded Access Width : 00 [Undefined/Legacy] [0F8h 0248 008h] Address : 0000000000000000 [100h 0256 00Ch] Sleep Status Register : [Generic Address Structure] [100h 0256 001h] Space ID : 00 [SystemMemory] [101h 0257 001h] Bit Width : 00 [102h 0258 001h] Bit Offset : 00 [103h 0259 001h] Encoded Access Width : 00 [Undefined/Legacy] [104h 0260 008h] Address : 0000000000000000 [10Ch 0268 008h] Hypervisor ID : 0000000000000000 Raw Table Data: Length 276 (0x114) 0000: 46 41 43 50 14 01 00 00 06 C6 43 4F 52 45 76 34 // FACP......COREv4 0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45 // COREBOOT....CORE 0020: 28 06 23 20 40 B2 87 76 00 90 85 76 00 08 09 00 // (.# @..v...v.... 0030: B2 00 00 00 E1 1E 00 00 00 18 00 00 00 00 00 00 // ................ 0040: 04 18 00 00 00 00 00 00 00 00 00 00 08 18 00 00 // ................ 0050: 60 18 00 00 00 00 00 00 04 02 00 04 20 00 00 00 // `........... ... 0060: 65 00 E9 03 00 00 00 00 00 00 0D 00 32 00 00 00 // e...........2... 0070: A5 0C 00 00 01 08 00 01 F9 0C 00 00 00 00 00 00 // ................ 0080: 06 00 00 00 00 00 00 00 00 00 00 00 00 90 85 76 // ...............v 0090: 00 00 00 00 01 20 00 02 00 18 00 00 00 00 00 00 // ..... .......... 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 01 10 00 02 // ................ 00B0: 04 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00D0: 01 20 00 03 08 18 00 00 00 00 00 00 01 00 00 01 // . .............. 00E0: 60 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // `............... 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0110: 00 00 00 00 // .... FACS ---- [000h 0000 004h] Signature : "FACS" [004h 0004 004h] Length : 00000040 [008h 0008 004h] Hardware Signature : 00000000 [00Ch 0012 004h] 32 Firmware Waking Vector : 00000000 [010h 0016 004h] Global Lock : 00000000 [014h 0020 004h] Flags (decoded below) : 00000000 S4BIOS Support Present : 0 64-bit Wake Supported (V2) : 0 [018h 0024 008h] 64 Firmware Waking Vector : 0000000000000000 [020h 0032 001h] Version : 01 [021h 0033 003h] Reserved : CC4F8A [024h 0036 004h] OspmFlags (decoded below) : CEE75BAF 64-bit Wake Env Required (V2) : 1 Raw Table Data: Length 64 (0x40) 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0020: 01 8A 4F CC AF 5B E7 CE 87 A6 2A AD A4 50 BF 96 // ..O..[....*..P.. 0030: C5 64 38 BB 14 E0 3A 13 E9 48 59 DA 1F EB 62 4B // .d8...:..HY...bK HPET ---- [000h 0000 004h] Signature : "HPET" [High Precision Event Timer Table] [004h 0004 004h] Table Length : 00000038 [008h 0008 001h] Revision : 01 [009h 0009 001h] Checksum : 10 [00Ah 0010 006h] Oem ID : "COREv4" [010h 0016 008h] Oem Table ID : "COREBOOT" [018h 0024 004h] Oem Revision : 00000000 [01Ch 0028 004h] Asl Compiler ID : "CORE" [020h 0032 004h] Asl Compiler Revision : 20230628 [024h 0036 004h] Hardware Block ID : 8086A701 [028h 0040 00Ch] Timer Block Register : [Generic Address Structure] [028h 0040 001h] Space ID : 00 [SystemMemory] [029h 0041 001h] Bit Width : 40 [02Ah 0042 001h] Bit Offset : 00 [02Bh 0043 001h] Encoded Access Width : 00 [Undefined/Legacy] [02Ch 0044 008h] Address : 00000000FED00000 [034h 0052 001h] Sequence Number : 00 [035h 0053 002h] Minimum Clock Ticks : 0000 [037h 0055 001h] Flags (decoded below) : 00 4K Page Protect : 0 64K Page Protect : 0 Raw Table Data: Length 56 (0x38) 0000: 48 50 45 54 38 00 00 00 01 10 43 4F 52 45 76 34 // HPET8.....COREv4 0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45 // COREBOOT....CORE 0020: 28 06 23 20 01 A7 86 80 00 40 00 00 00 00 D0 FE // (.# .....@...... 0030: 00 00 00 00 00 00 00 00 // ........ LPIT ---- [000h 0000 004h] Signature : "LPIT" [Low Power Idle Table] [004h 0004 004h] Table Length : 00000094 [008h 0008 001h] Revision : 00 [009h 0009 001h] Checksum : D2 [00Ah 0010 006h] Oem ID : "COREv4" [010h 0016 008h] Oem Table ID : "COREBOOT" [018h 0024 004h] Oem Revision : 00000000 [01Ch 0028 004h] Asl Compiler ID : "CORE" [020h 0032 004h] Asl Compiler Revision : 20230628 [024h 0036 004h] Subtable Type : 00000000 [Native C-state Idle Structure] [028h 0040 004h] Length : 00000038 [02Ch 0044 002h] Unique ID : 0000 [02Eh 0046 002h] Reserved : 0000 [030h 0048 004h] Flags (decoded below) : 00000000 State Disabled : 0 No Counter : 0 [034h 0052 00Ch] Entry Trigger : [Generic Address Structure] [034h 0052 001h] Space ID : 7F [FunctionalFixedHW] [035h 0053 001h] Bit Width : 01 [036h 0054 001h] Bit Offset : 02 [037h 0055 001h] Encoded Access Width : 00 [Undefined/Legacy] [038h 0056 008h] Address : 0000000000000060 [040h 0064 004h] Residency : 00007530 [044h 0068 004h] Latency : 00000BB8 [048h 0072 00Ch] Residency Counter : [Generic Address Structure] [048h 0072 001h] Space ID : 7F [FunctionalFixedHW] [049h 0073 001h] Bit Width : 40 [04Ah 0074 001h] Bit Offset : 00 [04Bh 0075 001h] Encoded Access Width : 00 [Undefined/Legacy] [04Ch 0076 008h] Address : 0000000000000632 [054h 0084 008h] Counter Frequency : 0000000000000000 [05Ch 0092 004h] Subtable Type : 00000000 [Native C-state Idle Structure] [060h 0096 004h] Length : 00000038 [064h 0100 002h] Unique ID : 0001 [066h 0102 002h] Reserved : 0000 [068h 0104 004h] Flags (decoded below) : 00000000 State Disabled : 0 No Counter : 0 [06Ch 0108 00Ch] Entry Trigger : [Generic Address Structure] [06Ch 0108 001h] Space ID : 7F [FunctionalFixedHW] [06Dh 0109 001h] Bit Width : 01 [06Eh 0110 001h] Bit Offset : 02 [06Fh 0111 001h] Encoded Access Width : 00 [Undefined/Legacy] [070h 0112 008h] Address : 0000000000000060 [078h 0120 004h] Residency : 00007530 [07Ch 0124 004h] Latency : 00000BB8 [080h 0128 00Ch] Residency Counter : [Generic Address Structure] [080h 0128 001h] Space ID : 00 [SystemMemory] [081h 0129 001h] Bit Width : 20 [082h 0130 001h] Bit Offset : 00 [083h 0131 001h] Encoded Access Width : 03 [DWord Access:32] [084h 0132 008h] Address : 00000000FE00193C [08Ch 0140 008h] Counter Frequency : 0000000000002005 Raw Table Data: Length 148 (0x94) 0000: 4C 50 49 54 94 00 00 00 00 D2 43 4F 52 45 76 34 // LPIT......COREv4 0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45 // COREBOOT....CORE 0020: 28 06 23 20 00 00 00 00 38 00 00 00 00 00 00 00 // (.# ....8....... 0030: 00 00 00 00 7F 01 02 00 60 00 00 00 00 00 00 00 // ........`....... 0040: 30 75 00 00 B8 0B 00 00 7F 40 00 00 32 06 00 00 // 0u.......@..2... 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0060: 38 00 00 00 01 00 00 00 00 00 00 00 7F 01 02 00 // 8............... 0070: 60 00 00 00 00 00 00 00 30 75 00 00 B8 0B 00 00 // `.......0u...... 0080: 00 20 00 03 3C 19 00 FE 00 00 00 00 05 20 00 00 // . ..<........ .. 0090: 00 00 00 00 // .... MCFG ---- [000h 0000 004h] Signature : "MCFG" [Memory Mapped Configuration Table] [004h 0004 004h] Table Length : 0000003C [008h 0008 001h] Revision : 01 [009h 0009 001h] Checksum : 1D [00Ah 0010 006h] Oem ID : "COREv4" [010h 0016 008h] Oem Table ID : "COREBOOT" [018h 0024 004h] Oem Revision : 00000000 [01Ch 0028 004h] Asl Compiler ID : "CORE" [020h 0032 004h] Asl Compiler Revision : 20230628 [024h 0036 008h] Reserved : 0000000000000000 [02Ch 0044 008h] Base Address : 00000000C0000000 [034h 0052 002h] Segment Group Number : 0000 [036h 0054 001h] Start Bus Number : 00 [037h 0055 001h] End Bus Number : FF [038h 0056 004h] Reserved : 00000000 Raw Table Data: Length 60 (0x3C) 0000: 4D 43 46 47 3C 00 00 00 01 1D 43 4F 52 45 76 34 // MCFG<.....COREv4 0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45 // COREBOOT....CORE 0020: 28 06 23 20 00 00 00 00 00 00 00 00 00 00 00 C0 // (.# ............ 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ SSDT ---- DefinitionBlock ("", "SSDT", 2, "COREv4", "COREBOOT", 0x00000000) { /* * iASL Warning: There were 8 external control methods found during * disassembly, but only 0 were resolved (8 unresolved). Additional * ACPI tables may be required to properly disassemble the code. This * resulting disassembler output file may not compile because the * disassembler did not know how many arguments to assign to the * unresolved methods. Note: SSDTs can be dynamically loaded at * runtime and may or may not be available via the host OS. * * To specify the tables needed to resolve external control method * references, the -e option can be used to specify the filenames. * Example iASL invocations: * iasl -e ssdt1.aml ssdt2.aml ssdt3.aml -d dsdt.aml * iasl -e dsdt.aml ssdt2.aml -d ssdt1.aml * iasl -e ssdt*.aml -d dsdt.aml * * In addition, the -fe option can be used to specify a file containing * control method external declarations with the associated method * argument counts. Each line of the file must be of the form: * External (<method pathname>, MethodObj, <argument count>) * Invocation: * iasl -fe refs.txt -d dsdt.aml * * The following methods were unresolved and many not compile properly * because the disassembler had to guess at the number of arguments * required for each: */ External (_SB_.MDSX, MethodObj) // Warning: Unknown method, guessing 1 arguments External (_SB_.MS0X, MethodObj) // Warning: Unknown method, guessing 1 arguments External (_SB_.PCI0, DeviceObj) External (_SB_.PCI0.CTXS, MethodObj) // Warning: Unknown method, guessing 1 arguments External (_SB_.PCI0.DPOF, UnknownObj) External (_SB_.PCI0.EGPM, MethodObj) // Warning: Unknown method, guessing 0 arguments External (_SB_.PCI0.FSPI, UnknownObj) External (_SB_.PCI0.GFX0, UnknownObj) External (_SB_.PCI0.GNA_, UnknownObj) External (_SB_.PCI0.GTXS, IntObj) External (_SB_.PCI0.HDAS, UnknownObj) External (_SB_.PCI0.HEC1, UnknownObj) External (_SB_.PCI0.I2C0, DeviceObj) External (_SB_.PCI0.I2C2, DeviceObj) External (_SB_.PCI0.LPCB, UnknownObj) External (_SB_.PCI0.LPCB.EC0_.EDSX, MethodObj) // Warning: Unknown method, guessing 1 arguments External (_SB_.PCI0.LPCB.EC0_.S0IX, MethodObj) // Warning: Unknown method, guessing 1 arguments External (_SB_.PCI0.MCHC, UnknownObj) External (_SB_.PCI0.RGPM, MethodObj) // Warning: Unknown method, guessing 0 arguments External (_SB_.PCI0.RP09, DeviceObj) External (_SB_.PCI0.SRAM, UnknownObj) External (_SB_.PCI0.STXS, MethodObj) // Warning: Unknown method, guessing 1 arguments External (_SB_.PCI0.UAR0, UnknownObj) External (_SB_.PCI0.XHCI, UnknownObj) External (PICM, IntObj) External (PPCM, IntObj) Device (CTBL) { Name (_HID, "BOOT0000") // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0B) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadOnly, 0x00000000, // Granularity 0x7689F000, // Range Minimum 0x768A6FFF, // Range Maximum 0x00000000, // Translation Offset 0x00008000, // Length ,, , AddressRangeMemory, TypeStatic) }) } Scope (\_SB.PCI0) { Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x3C) { Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x00000010 }, Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x00000011 }, Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x00000012 }, Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x00000010 }, Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x00000010 }, Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x00000012 }, Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x00000013 }, Package (0x04) { 0x0007FFFF, 0x01, 0x00, 0x00000014 }, Package (0x04) { 0x0007FFFF, 0x02, 0x00, 0x00000015 }, Package (0x04) { 0x0007FFFF, 0x03, 0x00, 0x00000016 }, Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x00000017 }, Package (0x04) { 0x000DFFFF, 0x00, 0x00, 0x00000011 }, Package (0x04) { 0x000DFFFF, 0x01, 0x00, 0x00000013 }, Package (0x04) { 0x0010FFFF, 0x00, 0x00, 0x00000018 }, Package (0x04) { 0x0010FFFF, 0x01, 0x00, 0x00000019 }, Package (0x04) { 0x0010FFFF, 0x02, 0x00, 0x00000014 }, Package (0x04) { 0x0010FFFF, 0x03, 0x00, 0x00000015 }, Package (0x04) { 0x0011FFFF, 0x00, 0x00, 0x0000001A }, Package (0x04) { 0x0011FFFF, 0x01, 0x00, 0x0000001B }, Package (0x04) { 0x0011FFFF, 0x02, 0x00, 0x0000001C }, Package (0x04) { 0x0011FFFF, 0x03, 0x00, 0x0000001D }, Package (0x04) { 0x0012FFFF, 0x00, 0x00, 0x0000001E }, Package (0x04) { 0x0012FFFF, 0x01, 0x00, 0x0000001F }, Package (0x04) { 0x0012FFFF, 0x02, 0x00, 0x00000016 }, Package (0x04) { 0x0013FFFF, 0x00, 0x00, 0x00000020 }, Package (0x04) { 0x0013FFFF, 0x01, 0x00, 0x00000021 }, Package (0x04) { 0x0013FFFF, 0x02, 0x00, 0x00000022 }, Package (0x04) { 0x0013FFFF, 0x03, 0x00, 0x00000023 }, Package (0x04) { 0x0014FFFF, 0x01, 0x00, 0x00000017 }, Package (0x04) { 0x0014FFFF, 0x00, 0x00, 0x00000024 }, Package (0x04) { 0x0014FFFF, 0x02, 0x00, 0x00000011 }, Package (0x04) { 0x0015FFFF, 0x00, 0x00, 0x00000025 }, Package (0x04) { 0x0015FFFF, 0x01, 0x00, 0x00000026 }, Package (0x04) { 0x0015FFFF, 0x02, 0x00, 0x00000027 }, Package (0x04) { 0x0015FFFF, 0x03, 0x00, 0x00000028 }, Package (0x04) { 0x0016FFFF, 0x00, 0x00, 0x00000012 }, Package (0x04) { 0x0016FFFF, 0x01, 0x00, 0x00000013 }, Package (0x04) { 0x0016FFFF, 0x02, 0x00, 0x00000014 }, Package (0x04) { 0x0016FFFF, 0x03, 0x00, 0x00000015 }, Package (0x04) { 0x0017FFFF, 0x00, 0x00, 0x00000016 }, Package (0x04) { 0x0019FFFF, 0x00, 0x00, 0x00000029 }, Package (0x04) { 0x0019FFFF, 0x01, 0x00, 0x0000002A }, Package (0x04) { 0x0019FFFF, 0x02, 0x00, 0x0000002B }, Package (0x04) { 0x001AFFFF, 0x00, 0x00, 0x00000017 }, Package (0x04) { 0x001CFFFF, 0x00, 0x00, 0x00000010 }, Package (0x04) { 0x001CFFFF, 0x01, 0x00, 0x00000011 }, Package (0x04) { 0x001CFFFF, 0x02, 0x00, 0x00000012 }, Package (0x04) { 0x001CFFFF, 0x03, 0x00, 0x00000013 }, Package (0x04) { 0x001DFFFF, 0x00, 0x00, 0x00000010 }, Package (0x04) { 0x001DFFFF, 0x01, 0x00, 0x00000011 }, Package (0x04) { 0x001DFFFF, 0x02, 0x00, 0x00000012 }, Package (0x04) { 0x001DFFFF, 0x03, 0x00, 0x00000013 }, Package (0x04) { 0x001EFFFF, 0x00, 0x00, 0x00000014 }, Package (0x04) { 0x001EFFFF, 0x01, 0x00, 0x00000015 }, Package (0x04) { 0x001EFFFF, 0x02, 0x00, 0x0000002C }, Package (0x04) { 0x001EFFFF, 0x03, 0x00, 0x0000002D }, Package (0x04) { 0x001FFFFF, 0x01, 0x00, 0x00000017 }, Package (0x04) { 0x001FFFFF, 0x02, 0x00, 0x00000014 }, Package (0x04) { 0x001FFFFF, 0x03, 0x00, 0x00000015 }, Package (0x04) { 0x001FFFFF, 0x00, 0x00, 0x00000016 } }) } Else { Return (Package (0x3C) { Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x0000000A }, Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x0000000B }, Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x0007FFFF, 0x01, 0x00, 0x0000000B }, Package (0x04) { 0x0007FFFF, 0x02, 0x00, 0x0000000B }, Package (0x04) { 0x0007FFFF, 0x03, 0x00, 0x0000000B }, Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x000DFFFF, 0x00, 0x00, 0x0000000A }, Package (0x04) { 0x000DFFFF, 0x01, 0x00, 0x0000000B }, Package (0x04) { 0x0010FFFF, 0x02, 0x00, 0x0000000B }, Package (0x04) { 0x0010FFFF, 0x03, 0x00, 0x0000000B }, Package (0x04) { 0x0012FFFF, 0x02, 0x00, 0x0000000B }, Package (0x04) { 0x0014FFFF, 0x01, 0x00, 0x0000000B }, Package (0x04) { 0x0014FFFF, 0x02, 0x00, 0x0000000A }, Package (0x04) { 0x0016FFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x0016FFFF, 0x01, 0x00, 0x0000000B }, Package (0x04) { 0x0016FFFF, 0x02, 0x00, 0x0000000B }, Package (0x04) { 0x0016FFFF, 0x03, 0x00, 0x0000000B }, Package (0x04) { 0x0017FFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x001AFFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x001CFFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x001CFFFF, 0x01, 0x00, 0x0000000A }, Package (0x04) { 0x001CFFFF, 0x02, 0x00, 0x0000000B }, Package (0x04) { 0x001CFFFF, 0x03, 0x00, 0x0000000B }, Package (0x04) { 0x001DFFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x001DFFFF, 0x01, 0x00, 0x0000000A }, Package (0x04) { 0x001DFFFF, 0x02, 0x00, 0x0000000B }, Package (0x04) { 0x001DFFFF, 0x03, 0x00, 0x0000000B }, Package (0x04) { 0x001EFFFF, 0x00, 0x00, 0x0000000B }, Package (0x04) { 0x001EFFFF, 0x01, 0x00, 0x0000000B }, Package (0x04) { 0x001FFFFF, 0x01, 0x00, 0x0000000B }, Package (0x04) { 0x001FFFFF, 0x02, 0x00, 0x0000000B }, Package (0x04) { 0x001FFFFF, 0x03, 0x00, 0x0000000B }, Package (0x04) { 0x001FFFFF, 0x00, 0x00, 0x0000000B } }) } } } Device (\_SB.CP00) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Name (_CST, Package (0x04) // _CST: C-States { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x01, 0x0001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000021, // Address 0x01, // Access Size ) }, 0x02, 0x007F, 0x0000015E }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000033, // Address 0x01, // Access Size ) }, 0x03, 0x00FD, 0x000000C8 } }) Name (GCPC, Package (0x17) { 0x00000017, 0x03, ResourceTemplate () { Register (FFixedHW, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000771, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x08, // Bit Width 0x08, // Bit Offset 0x00000000000000CE, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x08, // Bit Width 0x10, // Bit Offset 0x0000000000000771, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x08, // Bit Width 0x18, // Bit Offset 0x0000000000000771, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x08, // Bit Width 0x08, // Bit Offset 0x0000000000000771, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x08, // Bit Width 0x10, // Bit Offset 0x0000000000000774, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000774, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x08, // Bit Width 0x08, // Bit Offset 0x0000000000000774, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x40, // Bit Width 0x00, // Bit Offset 0x00000000000000E7, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x40, // Bit Width 0x00, // Bit Offset 0x00000000000000E8, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000777, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x00, // Bit Offset 0x0000000000000770, // Address 0x04, // Access Size ) }, 0x00000001, ResourceTemplate () { Register (FFixedHW, 0x0A, // Bit Width 0x20, // Bit Offset 0x0000000000000774, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (FFixedHW, 0x08, // Bit Width 0x18, // Bit Offset 0x0000000000000774, // Address 0x04, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { GCPC [0x03] = 0x0A GCPC [0x16] = 0x03E8 Return (GCPC) /* \_SB_.CP00.GCPC */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (PPCM) /* External reference */ } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000000, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x03) // _PSS: Performance Supported States { Package (0x06) { 0x000003E9, 0x00001770, 0x0000000A, 0x0000000A, 0x00002500, 0x00002500 }, Package (0x06) { 0x000003E8, 0x00001770, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000320, 0x00001251, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) } Device (\_SB.CP01) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (_CST, Package (0x04) // _CST: C-States { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x01, 0x0001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000021, // Address 0x01, // Access Size ) }, 0x02, 0x007F, 0x0000015E }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000033, // Address 0x01, // Access Size ) }, 0x03, 0x00FD, 0x000000C8 } }) Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { \_SB.CP00.GCPC [0x03] = 0x0A \_SB.CP00.GCPC [0x16] = 0x03E8 Return (\_SB.CP00.GCPC) } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (PPCM) /* External reference */ } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000001, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x03) // _PSS: Performance Supported States { Package (0x06) { 0x000003E9, 0x00001770, 0x0000000A, 0x0000000A, 0x00002500, 0x00002500 }, Package (0x06) { 0x000003E8, 0x00001770, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000320, 0x00001251, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) } Device (\_SB.CP02) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (_CST, Package (0x04) // _CST: C-States { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x01, 0x0001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000021, // Address 0x01, // Access Size ) }, 0x02, 0x007F, 0x0000015E }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000033, // Address 0x01, // Access Size ) }, 0x03, 0x00FD, 0x000000C8 } }) Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { \_SB.CP00.GCPC [0x03] = 0x0A \_SB.CP00.GCPC [0x16] = 0x03E8 Return (\_SB.CP00.GCPC) } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (PPCM) /* External reference */ } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000002, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x03) // _PSS: Performance Supported States { Package (0x06) { 0x000003E9, 0x00001770, 0x0000000A, 0x0000000A, 0x00002500, 0x00002500 }, Package (0x06) { 0x000003E8, 0x00001770, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000320, 0x00001251, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) } Device (\_SB.CP03) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x03) // _UID: Unique ID Name (_CST, Package (0x04) // _CST: C-States { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x01, 0x0001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000021, // Address 0x01, // Access Size ) }, 0x02, 0x007F, 0x0000015E }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000033, // Address 0x01, // Access Size ) }, 0x03, 0x00FD, 0x000000C8 } }) Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { \_SB.CP00.GCPC [0x03] = 0x0A \_SB.CP00.GCPC [0x16] = 0x03E8 Return (\_SB.CP00.GCPC) } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (PPCM) /* External reference */ } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, 0x00, 0x00000003, 0x000000FE, 0x00000001 } }) Name (_PSS, Package (0x03) // _PSS: Performance Supported States { Package (0x06) { 0x000003E9, 0x00001770, 0x0000000A, 0x0000000A, 0x00002500, 0x00002500 }, Package (0x06) { 0x000003E8, 0x00001770, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000320, 0x00001251, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) } Name (PPKG, Package (0x04) { \_SB.CP00, \_SB.CP01, \_SB.CP02, \_SB.CP03 }) Method (\_SB.CNOT, 1, NotSerialized) { Notify (\_SB.CP00, Arg0) Notify (\_SB.CP01, Arg0) Notify (\_SB.CP02, Arg0) Notify (\_SB.CP03, Arg0) } Scope (\_SB.PCI0) { Name (A4GB, 0x000000047FC00000) Name (A4GS, 0x0000007B80400000) } Scope (\_SB.PCI0) { Device (CNVW) { Name (_ADR, 0x0000000000140003) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } } } Scope (\_SB.PCI0.I2C0) { Name (FMCN, Package (0x03) { 0x006A, 0x00D5, 0x00000028 }) } Scope (\_SB.PCI0.I2C2) { Name (FMCN, Package (0x03) { 0x006A, 0x00D5, 0x00000028 }) } Scope (\_SB.PCI0) { Device (PMC) { Name (_HID, "INTC1026") // _HID: Hardware ID Name (_DDN, "Intel(R) Alder Lake IPC Controller") // _DDN: DOS Device Name Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0B) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0xFE000000, // Address Base 0x00010000, // Address Length ) }) Name (RVAL, Package (0x05) { Zero, Zero, Zero, Zero, Zero }) Method (IPCS, 7, Serialized) { OperationRegion (IPCM, SystemMemory, 0xFE000000, 0xFF) Field (IPCM, DWordAcc, NoLock, Preserve) { Offset (0x00), ICMD, 32, Offset (0x04), IBSY, 1, IERR, 1, Offset (0x06), IERC, 8, Offset (0x80), IWB0, 32, IWB1, 32, IWB2, 32, IWB3, 32, Offset (0x90), IRB0, 32, IRB1, 32, IRB2, 32, IRB3, 32 } IWB0 = Arg3 IWB1 = Arg4 IWB2 = Arg5 IWB3 = Arg6 Local0 = Zero Local0 += (Arg0 << Zero) Local0 += (Arg1 << 0x0C) Local1 = Zero Local0 += (Local1 << 0x08) Local0 += (Arg2 << 0x10) ICMD = Local0 Local1 = 0x03E8 While ((Local1 > Zero)) { If ((IBSY == Zero)) { RVAL [Zero] = Zero RVAL [One] = IRB0 /* \_SB_.PCI0.PMC_.IPCS.IRB0 */ RVAL [0x02] = IRB1 /* \_SB_.PCI0.PMC_.IPCS.IRB1 */ RVAL [0x03] = IRB2 /* \_SB_.PCI0.PMC_.IPCS.IRB2 */ RVAL [0x04] = IRB3 /* \_SB_.PCI0.PMC_.IPCS.IRB3 */ Return (RVAL) /* \_SB_.PCI0.PMC_.RVAL */ } If ((IERR == One)) { Debug = "IPCS ERROR" Debug = IERC /* \_SB_.PCI0.PMC_.IPCS.IERC */ RVAL [Zero] = One Return (RVAL) /* \_SB_.PCI0.PMC_.RVAL */ } Sleep (One) Local1-- } Debug = "IPCS TIMEOUT" RVAL [Zero] = 0x02 Return (RVAL) /* \_SB_.PCI0.PMC_.RVAL */ } } } Scope (\_SB.PCI0) { Device (PEPD) { Name (_HID, "INT33A1" /* Intel Power Engine */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0D80") /* Windows-compatible System Power Management Controller */) // _CID: Compatible ID Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { ToBuffer (Arg0, Local0) If ((Local0 == ToUUID ("c4eb40a0-6cd2-11e2-bcfd-0800200c9a66") /* Unknown UUID */)) { ToInteger (Arg2, Local1) If ((Local1 == Zero)) { Return (Buffer (One) { 0x7B // { }) } If ((Local1 == One)) { Return (Package (0x12) { Package (0x03) { \_SB.PCI0.MCHC, One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { \_SB.PCI0.GFX0, One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { \_SB.PCI0.GNA, One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { \_SB.PCI0.XHCI, One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { \_SB.PCI0.SRAM, One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { \_SB.PCI0.CNVW, One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { \_SB.PCI0.I2C0, One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { \_SB.PCI0.I2C2, One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { \_SB.PCI0.HEC1, One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { \_SB.PCI0.RP09, One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { \_SB.PCI0.UAR0, One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { \_SB.PCI0.LPCB, One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { \_SB.PCI0.HDAS, One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { \_SB.PCI0.FSPI, One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { \_SB.CP00, One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { \_SB.CP01, One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { \_SB.CP02, One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { \_SB.CP03, One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } } }) } If ((Local1 == 0x02)){} If ((Local1 == 0x03)) { If (CondRefOf (\_SB.PCI0.LPCB.EC0.EDSX)) { \_SB.PCI0.LPCB.EC0.EDSX (Zero) } If (CondRefOf (\_SB.MDSX)) { \_SB.MDSX (Zero) } } If ((Local1 == 0x04)) { If (CondRefOf (\_SB.PCI0.LPCB.EC0.EDSX)) { \_SB.PCI0.LPCB.EC0.EDSX (One) } If (CondRefOf (\_SB.MDSX)) { \_SB.MDSX (One) } } If ((Local1 == 0x05)) { If (CondRefOf (\_SB.PCI0.LPCB.EC0.S0IX)) { \_SB.PCI0.LPCB.EC0.S0IX (One) } If (CondRefOf (\_SB.MS0X)) { \_SB.MS0X (One) } If (CondRefOf (\_SB.PCI0.EGPM)) { \_SB.PCI0.EGPM () } If (CondRefOf (\_SB.PCI0.TXHC)) { \_SB.PCI0.DPOF = One } } If ((Local1 == 0x06)) { If (CondRefOf (\_SB.PCI0.LPCB.EC0.S0IX)) { \_SB.PCI0.LPCB.EC0.S0IX (Zero) } If (CondRefOf (\_SB.MS0X)) { \_SB.MS0X (Zero) } If (CondRefOf (\_SB.PCI0.RGPM)) { \_SB.PCI0.RGPM () } If (CondRefOf (\_SB.PCI0.TXHC)) { \_SB.PCI0.DPOF = Zero } } Return (Buffer (One) { 0x00 // . }) } If ((Local0 == ToUUID ("57a6512e-3979-4e9d-9708-ff13b2508972") /* Unknown UUID */)) { ToInteger (Arg2, Local1) If ((Local1 == Zero)) { Return (Buffer (One) { 0x03 // . }) } If ((Local1 == One)) { Return (Buffer (0xC0) { /* 0000 */ 0x36, 0x02, 0x7C, 0x75, 0xEF, 0x01, 0x7C, 0x80, // 6.|u..|. /* 0008 */ 0xAC, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x05, 0xE8, 0x3F, 0x18, 0x00, 0x00, 0xA0, 0xAA, // ..?..... /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0048 */ 0x7E, 0x02, 0xFE, 0xF7, 0xEF, 0x01, 0x7C, 0xE8, // ~.....|. /* 0050 */ 0xAD, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0058 */ 0xC5, 0xE8, 0x3F, 0x38, 0x00, 0x00, 0xA0, 0xAA, // ..?8.... /* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0068 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0070 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0078 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0080 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0088 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0090 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } Return (Buffer (One) { 0x00 // . }) } Return (Buffer (One) { 0x00 // . }) } } } Scope (\_SB.PCI0.CNVW) { Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x6D, 0x03 }) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { ToBuffer (Arg0, Local0) Return (Buffer (One) { 0x00 // . }) } } Scope (\_SB.PCI0.I2C0) { Device (D00F) { Name (_HID, "KIOX000A") // _HID: Hardware ID Name (_CID, "KIOX000A") // _CID: Compatible ID Name (_UID, Zero) // _UID: Unique ID Name (_DDN, "Accelerometer") // _DDN: DOS Device Name Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { I2cSerialBusV2 (0x000F, ControllerInitiated, 0x00061A80, AddressingMode7Bit, "\\_SB.PCI0.I2C0", 0x00, ResourceConsumer, , Exclusive, ) }) Method (ROTM, 0, NotSerialized) { Package (0x03) { "1 0 0", "0 -1 0", "0 0 1" } } Method (_CDM, 1, NotSerialized) // _CDM: Clock Domain { Return (0x00ABCD06) } } } Scope (\_SB.PCI0.I2C2) { Device (H05D) { Name (_HID, "GXTP7386") // _HID: Hardware ID Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID Name (_UID, Zero) // _UID: Unique ID Name (_DDN, "Touchscreen") // _DDN: DOS Device Name Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { I2cSerialBusV2 (0x005D, ControllerInitiated, 0x00061A80, AddressingMode7Bit, "\\_SB.PCI0.I2C2", 0x00, ResourceConsumer, , Exclusive, ) GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000, "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer, , ) { // Pin list 0x0132 } GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer, , ) { // Pin list 0x0131 } }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "irq-gpios", Package (0x04) { \_SB.PCI0.I2C2.H05D, Zero, Zero, Zero } }, Package (0x02) { "reset-gpios", Package (0x04) { \_SB.PCI0.I2C2.H05D, One, Zero, One } } } }) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { ToBuffer (Arg0, Local0) If ((Local0 == ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */)) { ToInteger (Arg2, Local1) If ((Local1 == Zero)) { ToInteger (Arg1, Local2) If ((Local2 == One)) { Return (Buffer (One) { 0x03 // . }) } Else { Return (Buffer (One) { 0x00 // . }) } } If ((Local1 == One)) { Return (0x01) } Return (Buffer (One) { 0x00 // . }) } Return (Buffer (One) { 0x00 // . }) } } } Scope (\_SB.PCI0) { Mutex (R3MX, 0x00) } Scope (\_SB.PCI0.RP09) { OperationRegion (PXCS, PCI_Config, Zero, 0xFF) Field (PXCS, AnyAcc, NoLock, Preserve) { Offset (0x52), , 13, LASX, 1, Offset (0xE0), , 7, NCB7, 1, Offset (0xE2), , 2, L23E, 1, L23R, 1 } OperationRegion (PMCP, SystemMemory, 0xFE001000, 0xFF) Field (PMCP, DWordAcc, NoLock, Preserve) { Offset (0xD0), Offset (0xD1), EMPG, 1, Offset (0xD4), Offset (0xD5), AMPG, 1 } Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { RTD3 }) PowerResource (RTD3, 0x00, 0x0000) { Method (_STA, 0, NotSerialized) // _STA: Status { 0x87 = \_SB.PCI0.GTXS /* External reference */ Local0 Return (Local0) } Method (_ON, 0, Serialized) // _ON_: Power On { Local0 = \_SB.PCI0.RP09.RTD3._STA () If ((Local0 == One)) { Return (One) } Acquire (\_SB.PCI0.R3MX, 0xFFFF) EMPG = Zero Local7 = 0x32 While ((Local7 > Zero)) { If ((AMPG == Zero)) { Break } Sleep (0x02) Local7-- } If ((Local7 == Zero)) { Debug = "WARN: Wait loop timeout for variable AMPG" } Release (\_SB.PCI0.R3MX) \_SB.PCI0.STXS (0x87) \_SB.PCI0.PMC.IPCS (0xAC, Zero, 0x10, 0x00000001, 0x00000001, 0x00000100, 0x00000100) \_SB.PCI0.STXS (0x5F) If ((NCB7 == One)) { L23R = One Local7 = 0xA0 While ((Local7 > Zero)) { If ((L23R == Zero)) { Break } Sleep (0x02) Local7-- } If ((Local7 == Zero)) { Debug = "WARN: Wait loop timeout for variable L23R" } NCB7 = Zero Local7 = 0x40 While ((Local7 > Zero)) { If ((LASX == One)) { Break } Sleep (0x02) Local7-- } If ((Local7 == Zero)) { Debug = "WARN: Wait loop timeout for variable LASX" } } } Method (_OFF, 0, Serialized) // _OFF: Power Off { L23E = One Local7 = 0x40 While ((Local7 > Zero)) { If ((L23E == Zero)) { Break } Sleep (0x02) Local7-- } If ((Local7 == Zero)) { Debug = "WARN: Wait loop timeout for variable L23E" } NCB7 = One \_SB.PCI0.CTXS (0x5F) Acquire (\_SB.PCI0.R3MX, 0xFFFF) EMPG = One Local7 = 0x32 While ((Local7 > Zero)) { If ((AMPG == One)) { Break } Sleep (0x02) Local7-- } If ((Local7 == Zero)) { Debug = "WARN: Wait loop timeout for variable AMPG" } Release (\_SB.PCI0.R3MX) \_SB.PCI0.PMC.IPCS (0xAC, Zero, 0x10, 0x00000001, 0x00000000, 0x00000100, 0x00000000) \_SB.PCI0.CTXS (0x87) } } Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("6211e2c0-58a3-4af3-90e1-927a4e0c55a4") /* Unknown UUID */, Package (0x01) { Package (0x02) { "HotPlugSupportInD3", One } } }) Device (PXSX) { Name (_ADR, 0x0000000000000000) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_S0W, 0x03) // _S0W: S0 Device Wake State Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("5025030f-842f-4ab4-a561-99a5189762d0") /* Unknown UUID */, Package (0x01) { Package (0x02) { "StorageD3Enable", One } } }) } } Scope (\_SB.PCI0.PMC) { Device (MUX) { Name (_HID, "INTC105C") // _HID: Hardware ID Name (_DDN, "Intel PMC MUX Driver") // _DDN: DOS Device Name } } Scope (\_SB.PCI0.PMC.MUX) { Device (CON0) { Name (_ADR, Zero) // _ADR: Address Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "usb2-port-number", One }, Package (0x02) { "usb3-port-number", 0x03 } } }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { ToPLD ( PLD_Revision = 0x2, PLD_IgnoreColor = 0x1, PLD_Red = 0x0, PLD_Green = 0x0, PLD_Blue = 0x0, PLD_Width = 0x0, PLD_Height = 0x0, PLD_UserVisible = 0x1, PLD_Dock = 0x0, PLD_Lid = 0x0, PLD_Panel = "UNKNOWN", PLD_VerticalPosition = "CENTER", PLD_HorizontalPosition = "CENTER", PLD_Shape = "HORIZONTALRECTANGLE", PLD_GroupOrientation = 0x0, PLD_GroupToken = 0x0, PLD_GroupPosition = 0x0, PLD_Bay = 0x0, PLD_Ejectable = 0x0, PLD_EjectRequired = 0x0, PLD_CabinetNumber = 0x0, PLD_CardCageNumber = 0x0, PLD_Reference = 0x0, PLD_Rotation = 0x0, PLD_Order = 0x0, PLD_VerticalOffset = 0x0, PLD_HorizontalOffset = 0x0) }) } } Scope (\_SB.PCI0.PMC.MUX) { Device (CON1) { Name (_ADR, One) // _ADR: Address Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "usb2-port-number", 0x02 }, Package (0x02) { "usb3-port-number", One } } }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { ToPLD ( PLD_Revision = 0x2, PLD_IgnoreColor = 0x1, PLD_Red = 0x0, PLD_Green = 0x0, PLD_Blue = 0x0, PLD_Width = 0x0, PLD_Height = 0x0, PLD_UserVisible = 0x1, PLD_Dock = 0x0, PLD_Lid = 0x0, PLD_Panel = "UNKNOWN", PLD_VerticalPosition = "CENTER", PLD_HorizontalPosition = "CENTER", PLD_Shape = "HORIZONTALRECTANGLE", PLD_GroupOrientation = 0x0, PLD_GroupToken = 0x0, PLD_GroupPosition = 0x0, PLD_Bay = 0x0, PLD_Ejectable = 0x0, PLD_EjectRequired = 0x0, PLD_CabinetNumber = 0x0, PLD_CardCageNumber = 0x0, PLD_Reference = 0x0, PLD_Rotation = 0x0, PLD_Order = 0x0, PLD_VerticalOffset = 0x0, PLD_HorizontalOffset = 0x0) }) } } } TPM2 ---- [000h 0000 004h] Signature : "TPM2" [Trusted Platform Module hardware interface Table] [004h 0004 004h] Table Length : 0000004C [008h 0008 001h] Revision : 04 [009h 0009 001h] Checksum : 10 [00Ah 0010 006h] Oem ID : "COREv4" [010h 0016 008h] Oem Table ID : "COREBOOT" [018h 0024 004h] Oem Revision : 00000000 [01Ch 0028 004h] Asl Compiler ID : "CORE" [020h 0032 004h] Asl Compiler Revision : 20230628 [024h 0036 002h] Platform Class : 0000 [026h 0038 002h] Reserved : 0000 [028h 0040 008h] Control Address : 0000000000000000 [030h 0048 004h] Start Method : 06 [Memory Mapped I/O] [034h 0052 00Ch] Method Parameters : 00 00 00 00 00 00 00 00 00 00 00 00 [040h 0064 004h] Minimum Log Length : 00010000 [044h 0068 008h] Log Address : 000000007686B000 Raw Table Data: Length 76 (0x4C) 0000: 54 50 4D 32 4C 00 00 00 04 10 43 4F 52 45 76 34 // TPM2L.....COREv4 0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45 // COREBOOT....CORE 0020: 28 06 23 20 00 00 00 00 00 00 00 00 00 00 00 00 // (.# ............ 0030: 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0040: 00 00 01 00 00 B0 86 76 00 00 00 00 // .......v....